drm/amdgpu: add support for inplace IB patching for MM engines v2

We are going to need that for the second UVD instance on Vega20.

v2: rename to patch_cs_in_place

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0283e2b3c851ac8e19eaaeca9bf47c8add4a85ec..1f6345dda6ead26b4bb8de7744a57db066647bad 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1748,6 +1748,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr)))
 #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags)))
 #define amdgpu_ring_parse_cs(r, p, ib) ((r)->funcs->parse_cs((p), (ib)))
+#define amdgpu_ring_patch_cs_in_place(r, p, ib) ((r)->funcs->patch_cs_in_place((p), (ib)))
 #define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r))
 #define amdgpu_ring_test_ib(r, t) (r)->funcs->test_ib((r), (t))
 #define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 178d9ce4eba1fd596ff930b21e3a1a113cf1000e..533b2e7656c05042d83425bd04169fc08d2d99f5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -916,7 +916,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
        int r;
 
        /* Only for UVD/VCE VM emulation */
-       if (p->ring->funcs->parse_cs) {
+       if (p->ring->funcs->parse_cs || p->ring->funcs->patch_cs_in_place) {
                unsigned i, j;
 
                for (i = 0, j = 0; i < p->nchunks && j < p->job->num_ibs; i++) {
@@ -957,12 +957,20 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
                        offset = m->start * AMDGPU_GPU_PAGE_SIZE;
                        kptr += va_start - offset;
 
-                       memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);
-                       amdgpu_bo_kunmap(aobj);
-
-                       r = amdgpu_ring_parse_cs(ring, p, j);
-                       if (r)
-                               return r;
+                       if (p->ring->funcs->parse_cs) {
+                               memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);
+                               amdgpu_bo_kunmap(aobj);
+
+                               r = amdgpu_ring_parse_cs(ring, p, j);
+                               if (r)
+                                       return r;
+                       } else {
+                               ib->ptr = (uint32_t *)kptr;
+                               r = amdgpu_ring_patch_cs_in_place(ring, p, j);
+                               amdgpu_bo_kunmap(aobj);
+                               if (r)
+                                       return r;
+                       }
 
                        j++;
                }

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 5018c0b6bf1a4e0786cf494c9ce6cb4fafc71794..d242b9a51e90f35618aff89c97a8ef9a1165adce 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -123,6 +123,7 @@ struct amdgpu_ring_funcs {
        void (*set_wptr)(struct amdgpu_ring *ring);
        /* validating and patching of IBs */
        int (*parse_cs)(struct amdgpu_cs_parser *p, uint32_t ib_idx);
+       int (*patch_cs_in_place)(struct amdgpu_cs_parser *p, uint32_t ib_idx);
        /* constants to calculate how many DW are needed for an emit */
        unsigned emit_frame_size;
        unsigned emit_ib_size;