return copy_to_user(out, &vram_gtt,
min((size_t)size, sizeof(vram_gtt))) ? -EFAULT : 0;
}
+ case AMDGPU_INFO_VRAM_GTT_TOTAL: {
+ struct drm_amdgpu_info_vram_gtt_total vram_gtt_total;
+
+ vram_gtt_total.vram_total_size = adev->mc.real_vram_size;
+ vram_gtt_total.vram_cpu_accessible_total_size = adev->mc.visible_vram_size;
+ vram_gtt_total.gtt_total_size = adev->mc.gtt_size;
+ return copy_to_user(out, &vram_gtt_total,
+ min((size_t)size, sizeof(vram_gtt_total)))
+ ? -EFAULT : 0;
+ }
case AMDGPU_INFO_READ_MMR_REG: {
unsigned n, alloc_size;
uint32_t *regs;
#define AMDGPU_INFO_VIS_VRAM_USAGE 0x17
/* number of TTM buffer evictions */
#define AMDGPU_INFO_NUM_EVICTIONS 0x18
+/* Query the total size of VRAM and GTT domains */
+#define AMDGPU_INFO_VRAM_GTT_TOTAL 0x19
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
__u64 gtt_size;
};
+struct drm_amdgpu_info_vram_gtt_total {
+ __u64 vram_total_size;
+ __u64 vram_cpu_accessible_total_size;
+ __u64 gtt_total_size;
+};
+
struct drm_amdgpu_info_firmware {
__u32 ver;
__u32 feature;