Documentation/bindings: Document the Alpine MSIX driver
authorAntoine Tenart <antoine.tenart@free-electrons.com>
Fri, 19 Feb 2016 15:22:45 +0000 (16:22 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Wed, 9 Mar 2016 09:37:53 +0000 (09:37 +0000)
Following the addition of the Alpine MSIX driver, this patch adds the
corresponding bindings documentation.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Tsahee Zidenberg <tsahee@annapurnalabs.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt b/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt
new file mode 100644 (file)
index 0000000..f6f1c14
--- /dev/null
@@ -0,0 +1,26 @@
+Alpine MSIX controller
+
+See arm,gic-v3.txt for SPI and MSI definitions.
+
+Required properties:
+
+- compatible: should be "al,alpine-msix"
+- reg: physical base address and size of the registers
+- interrupt-parent: specifies the parent interrupt controller.
+- interrupt-controller: identifies the node as an interrupt controller
+- msi-controller: identifies the node as an PCI Message Signaled Interrupt
+                 controller
+- al,msi-base-spi: SPI base of the MSI frame
+- al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
+
+Example:
+
+msix: msix {
+       compatible = "al,alpine-msix";
+       reg = <0x0 0xfbe00000 0x0 0x100000>;
+       interrupt-parent = <&gic>;
+       interrupt-controller;
+       msi-controller;
+       al,msi-base-spi = <160>;
+       al,msi-num-spis = <160>;
+};