drm/amd/powerplay: use pp_feature_mask to control uclk(mclk) dpm enabled

the uclk dpm feature is not work well on all navi10 asic,
use pp feature mask module parameter to control it.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 4310f8621061e4f99689e5c8df07f7ed8a46f44b..425523381f625b193cb44110d26b4c2506fefc49 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -315,9 +315,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
                                | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)
                                | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT)
                                | FEATURE_MASK(FEATURE_DPM_LINK_BIT)
-                               | FEATURE_MASK(FEATURE_DPM_UCLK_BIT)
-                               | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)
-                               | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT)
                                | FEATURE_MASK(FEATURE_GFX_ULV_BIT)
                                | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT)
                                | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)
@@ -336,6 +333,11 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
                                | FEATURE_MASK(FEATURE_FW_DSTATE_BIT)
                                | FEATURE_MASK(FEATURE_ACDC_BIT);
 
+       if (adev->pm.pp_feature & PP_MCLK_DPM_MASK)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT)
+                               | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)
+                               | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT);
+
        if (adev->pm.pp_feature & PP_GFXOFF_MASK) {
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_SS_BIT)
                                | FEATURE_MASK(FEATURE_GFXOFF_BIT);