drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.
authoryanyang1 <Young.Yang@amd.com>
Fri, 5 Feb 2016 09:43:17 +0000 (17:43 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 May 2016 00:26:26 +0000 (20:26 -0400)
update relational h files.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/smu_ucode_xfer_vi.h
drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h
drivers/gpu/drm/amd/powerplay/inc/smu_ucode_xfer_vi.h

index c24a81eebc7cb10c99a6a3b9d7f577a1f9044724..880152c0f775e350e51e0b0ccb5d72ebcd45f806 100644 (file)
@@ -44,6 +44,7 @@
 #define UCODE_ID_IH_REG_RESTORE   11
 #define UCODE_ID_VBIOS            12
 #define UCODE_ID_MISC_METADATA    13
+#define UCODE_ID_SMU_SK                      14
 #define UCODE_ID_RLC_SCRATCH      32
 #define UCODE_ID_RLC_SRM_ARAM     33
 #define UCODE_ID_RLC_SRM_DRAM     34
index 733fa371a29c078b83bb6817c21f1ac0a063b80b..f81626257a371bf000b652646c38059d72e0fdbc 100644 (file)
@@ -71,8 +71,12 @@ struct SMU_SclkSetting {
        uint16_t    Pcc_fcw_int;
        uint8_t     PllRange;
        uint8_t     SSc_En;
+       uint16_t    Sclk_slew_rate;
+       uint16_t    Pcc_up_slew_rate;
+       uint16_t    Pcc_down_slew_rate;
        uint16_t    Fcw1_int;
        uint16_t    Fcw1_frac;
+       uint16_t    Sclk_ss_slew_rate;
 };
 typedef struct SMU_SclkSetting SMU_SclkSetting;
 
@@ -120,7 +124,8 @@ struct SMU74_Discrete_Ulv {
        uint16_t    VddcOffset;
        uint8_t     VddcOffsetVid;
        uint8_t     VddcPhase;
-       uint32_t    Reserved;
+       uint16_t    BifSclkDfs;
+       uint16_t    Reserved;
 };
 
 typedef struct SMU74_Discrete_Ulv SMU74_Discrete_Ulv;
@@ -155,7 +160,8 @@ struct SMU74_Discrete_LinkLevel {
        uint8_t     SPC;
        uint32_t    DownThreshold;
        uint32_t    UpThreshold;
-       uint32_t    Reserved;
+       uint16_t    BifSclkDfs;
+       uint16_t    Reserved;
 };
 
 typedef struct SMU74_Discrete_LinkLevel SMU74_Discrete_LinkLevel;
index c24a81eebc7cb10c99a6a3b9d7f577a1f9044724..880152c0f775e350e51e0b0ccb5d72ebcd45f806 100644 (file)
@@ -44,6 +44,7 @@
 #define UCODE_ID_IH_REG_RESTORE   11
 #define UCODE_ID_VBIOS            12
 #define UCODE_ID_MISC_METADATA    13
+#define UCODE_ID_SMU_SK                      14
 #define UCODE_ID_RLC_SCRATCH      32
 #define UCODE_ID_RLC_SRM_ARAM     33
 #define UCODE_ID_RLC_SRM_DRAM     34