dt-bindings: Add binding for atmel-usart in SPI mode

This patch moves the bindings for serial from serial/atmel-usart.txt to
mfd/atmel-usart.txt and adds bindings for USART in SPI mode.

Signed-off-by: Radu Pirea <radu.pirea@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

diff --git a/Documentation/devicetree/bindings/mfd/atmel-usart.txt b/Documentation/devicetree/bindings/mfd/atmel-usart.txt
new file mode 100644 (file)
index 0000000..0348fef
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel-usart.txt
@@ -0,0 +1,85 @@
+* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
+
+Required properties for USART:
+- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
+  The compatible <chip> indicated will be the first SoC to support an
+  additional mode or an USART new feature.
+  For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt
+- clock-names: tuple listing input clock names.
+       Required elements: "usart"
+- clocks: phandles to input clocks.
+
+Required properties for USART in SPI mode:
+- #size-cells      : Must be <0>
+- #address-cells   : Must be <1>
+- cs-gpios: chipselects (internal cs not supported)
+- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
+
+Optional properties in serial mode:
+- atmel,use-dma-rx: use of PDC or DMA for receiving data
+- atmel,use-dma-tx: use of PDC or DMA for transmitting data
+- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
+  It will use specified PIO instead of the peripheral function pin for the USART feature.
+  If unsure, don't specify this property.
+- add dma bindings for dma transfer:
+       - dmas: DMA specifier, consisting of a phandle to DMA controller node,
+               memory peripheral interface and USART DMA channel ID, FIFO configuration.
+               Refer to dma.txt and atmel-dma.txt for details.
+       - dma-names: "rx" for RX channel, "tx" for TX channel.
+- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
+  capable USARTs.
+- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
+
+<chip> compatible description:
+- at91rm9200:  legacy USART support
+- at91sam9260: generic USART implementation for SAM9 SoCs
+
+Example:
+- use PDC:
+       usart0: serial@fff8c000 {
+               compatible = "atmel,at91sam9260-usart";
+               reg = <0xfff8c000 0x4000>;
+               interrupts = <7>;
+               clocks = <&usart0_clk>;
+               clock-names = "usart";
+               atmel,use-dma-rx;
+               atmel,use-dma-tx;
+               rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
+               cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
+               dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
+               dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
+               dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
+               rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
+       };
+
+- use DMA:
+       usart0: serial@f001c000 {
+               compatible = "atmel,at91sam9260-usart";
+               reg = <0xf001c000 0x100>;
+               interrupts = <12 4 5>;
+               clocks = <&usart0_clk>;
+               clock-names = "usart";
+               atmel,use-dma-rx;
+               atmel,use-dma-tx;
+               dmas = <&dma0 2 0x3>,
+                      <&dma0 2 0x204>;
+               dma-names = "tx", "rx";
+               atmel,fifo-size = <32>;
+       };
+
+- SPI mode:
+       #include <dt-bindings/mfd/at91-usart.h>
+
+       spi0: spi@f001c000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
+               atmel,usart-mode = <AT91_USART_MODE_SPI>;
+               reg = <0xf001c000 0x100>;
+               interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&usart0_clk>;
+               clock-names = "usart";
+               cs-gpios = <&pioB 3 0>;
+       };

diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt
deleted file mode 100644 (file)
index 7c0d6b2..0000000
--- a/Documentation/devicetree/bindings/serial/atmel-usart.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
-
-Required properties:
-- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
-  The compatible <chip> indicated will be the first SoC to support an
-  additional mode or an USART new feature.
-  For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt
-- clock-names: tuple listing input clock names.
-       Required elements: "usart"
-- clocks: phandles to input clocks.
-
-Optional properties:
-- atmel,use-dma-rx: use of PDC or DMA for receiving data
-- atmel,use-dma-tx: use of PDC or DMA for transmitting data
-- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
-  It will use specified PIO instead of the peripheral function pin for the USART feature.
-  If unsure, don't specify this property.
-- add dma bindings for dma transfer:
-       - dmas: DMA specifier, consisting of a phandle to DMA controller node,
-               memory peripheral interface and USART DMA channel ID, FIFO configuration.
-               Refer to dma.txt and atmel-dma.txt for details.
-       - dma-names: "rx" for RX channel, "tx" for TX channel.
-- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
-  capable USARTs.
-- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
-
-<chip> compatible description:
-- at91rm9200:  legacy USART support
-- at91sam9260: generic USART implementation for SAM9 SoCs
-
-Example:
-- use PDC:
-       usart0: serial@fff8c000 {
-               compatible = "atmel,at91sam9260-usart";
-               reg = <0xfff8c000 0x4000>;
-               interrupts = <7>;
-               clocks = <&usart0_clk>;
-               clock-names = "usart";
-               atmel,use-dma-rx;
-               atmel,use-dma-tx;
-               rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
-               cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
-               dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
-               dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
-               dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
-               rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
-       };
-
-- use DMA:
-       usart0: serial@f001c000 {
-               compatible = "atmel,at91sam9260-usart";
-               reg = <0xf001c000 0x100>;
-               interrupts = <12 4 5>;
-               clocks = <&usart0_clk>;
-               clock-names = "usart";
-               atmel,use-dma-rx;
-               atmel,use-dma-tx;
-               dmas = <&dma0 2 0x3>,
-                      <&dma0 2 0x204>;
-               dma-names = "tx", "rx";
-               atmel,fifo-size = <32>;
-       };

diff --git a/include/dt-bindings/mfd/at91-usart.h b/include/dt-bindings/mfd/at91-usart.h
new file mode 100644 (file)
index 0000000..2de5bc3
--- /dev/null
+++ b/include/dt-bindings/mfd/at91-usart.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides macros for AT91 USART DT bindings.
+ *
+ * Copyright (C) 2018 Microchip Technology
+ *
+ * Author: Radu Pirea <radu.pirea@microchip.com>
+ *
+ */
+
+#ifndef __DT_BINDINGS_AT91_USART_H__
+#define __DT_BINDINGS_AT91_USART_H__
+
+#define AT91_USART_MODE_SERIAL 0
+#define AT91_USART_MODE_SPI    1
+
+#endif /* __DT_BINDINGS_AT91_USART_H__ */