ARM: tegra: dts: add slink controller dt entry
authorLaxman Dewangan <ldewangan@nvidia.com>
Tue, 30 Oct 2012 07:05:23 +0000 (12:35 +0530)
committerStephen Warren <swarren@nvidia.com>
Thu, 15 Nov 2012 22:07:29 +0000 (15:07 -0700)
Add slink controller details in the dts file of
Tegra20 and Tegra30.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index f40cfbaa7c7e3a70438570dd2dde4626191dafad..514ee2849420c99cb3f98e0cdb40bc5ee6de9ed6 100644 (file)
                status = "disabled";
        };
 
+       spi@7000d400 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d400 0x200>;
+               interrupts = <0 59 0x04>;
+               nvidia,dma-request-selector = <&apbdma 15>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000d600 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d600 0x200>;
+               interrupts = <0 82 0x04>;
+               nvidia,dma-request-selector = <&apbdma 16>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000d800 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d480 0x200>;
+               interrupts = <0 83 0x04>;
+               nvidia,dma-request-selector = <&apbdma 17>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000da00 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000da00 0x200>;
+               interrupts = <0 93 0x04>;
+               nvidia,dma-request-selector = <&apbdma 18>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        pmc {
                compatible = "nvidia,tegra20-pmc";
                reg = <0x7000e400 0x400>;
index 148371b432a0e63a6ea648a184f29944ea5eb3a9..9c08c1ba8378980515c554e87b0236cce874a5a8 100644 (file)
                status = "disabled";
        };
 
+       spi@7000d400 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000d400 0x200>;
+               interrupts = <0 59 0x04>;
+               nvidia,dma-request-selector = <&apbdma 15>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000d600 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000d600 0x200>;
+               interrupts = <0 82 0x04>;
+               nvidia,dma-request-selector = <&apbdma 16>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000d800 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000d480 0x200>;
+               interrupts = <0 83 0x04>;
+               nvidia,dma-request-selector = <&apbdma 17>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000da00 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000da00 0x200>;
+               interrupts = <0 93 0x04>;
+               nvidia,dma-request-selector = <&apbdma 18>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000dc00 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000dc00 0x200>;
+               interrupts = <0 94 0x04>;
+               nvidia,dma-request-selector = <&apbdma 27>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000de00 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000de00 0x200>;
+               interrupts = <0 79 0x04>;
+               nvidia,dma-request-selector = <&apbdma 28>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        pmc {
                compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
                reg = <0x7000e400 0x400>;