The datasheet uses the name "All Mask" for this bit. Change the name of
our #define to be consistent with the datasheet. While here also replace
the tab between the #define and IP101A_G_IRQ_ALL_MASK with a space.
No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
#define IP101A_G_APS_ON BIT(1) /* IP101A/G APS Mode bit */
#define IP101A_G_IRQ_CONF_STATUS 0x11 /* Conf Info IRQ & Status Reg */
#define IP101A_G_IRQ_PIN_USED BIT(15) /* INTR pin used */
-#define IP101A_G_NO_IRQ BIT(11) /* IRQ's inactive */
+#define IP101A_G_IRQ_ALL_MASK BIT(11) /* IRQ's inactive */
static int ip175c_config_init(struct phy_device *phydev)
{
/* INTR pin used: Speed/link/duplex will cause an interrupt */
val = IP101A_G_IRQ_PIN_USED;
else
- val = IP101A_G_NO_IRQ;
+ val = IP101A_G_IRQ_ALL_MASK;
return phy_write(phydev, IP101A_G_IRQ_CONF_STATUS, val);
}