dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo PHY Bindings

Add the Amlogic G12A Family USB3 + PCIE Combo PHY Bindings.

This PHY can provide exclusively USB3 or PCIE support on shared I/Os.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
new file mode 100644 (file)
index 0000000..7cfc17e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
@@ -0,0 +1,22 @@
+* Amlogic G12A USB3 + PCIE Combo PHY binding
+
+Required properties:
+- compatible:  Should be "amlogic,meson-g12a-usb3-pcie-phy"
+- #phys-cells: must be 1. The cell number is used to select the phy mode
+  as defined in <dt-bindings/phy/phy.h> between PHY_TYPE_USB3 and PHY_TYPE_PCIE
+- reg:         The base address and length of the registers
+- clocks:      a phandle to the 100MHz reference clock of this PHY
+- clock-names: must be "ref_clk"
+- resets:      phandle to the reset lines for the PHY control
+- reset-names: must be "phy"
+
+Example:
+       usb3_pcie_phy: phy@46000 {
+               compatible = "amlogic,g12a-usb3-pcie-phy";
+               reg = <0x0 0x46000 0x0 0x2000>;
+               clocks = <&clkc CLKID_PCIE_PLL>;
+               clock-names = "ref_clk";
+               resets = <&reset RESET_PCIE_PHY>;
+               reset-names = "phy";
+               #phy-cells = <1>;
+       };