PCI: Wait for device to become ready after a power management reset

PCIe r4.0, sec 2.3.1, Request Handling Rules, indicates that a device can
return CRS Completion Status following a D3hot to D0 transition.  Wait
until the device becomes ready in that situation.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 9493b97436c3d6cfbea521ed5f366f455bd8cea8..a3042e475901a491f8efb2dbeb07f2d6f35a7cb4 100644 (file)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4188,7 +4188,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
        pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
        pci_dev_d3_sleep(dev);
 
-       return 0;
+       return pci_dev_wait(dev, "PM D3->D0", PCIE_RESET_READY_POLL_MS);
 }
 
 void pci_reset_secondary_bus(struct pci_dev *dev)