drm/amdgpu: Add SOC15_WAIT_ON_RREG macro define

Add new macro to wait on a register field to be a specific
value.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index def865067edd2b2cadc820824442b0006b057b2c..0942f492d2e19379eedbaf818363fe534922b99c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -47,6 +47,21 @@
 #define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \
        WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value)
 
+#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask, ret) \
+       do {                                                    \
+               uint32_t tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
+               uint32_t loop = adev->usec_timeout;             \
+               while ((tmp_ & (mask)) != (expected_value)) {   \
+                       udelay(2);                              \
+                       tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
+                       loop--;                                 \
+                       if (!loop) {                            \
+                               ret = -ETIMEDOUT;               \
+                               break;                          \
+                       }                                       \
+               }                                               \
+       } while (0)
+
 #endif