net/mlx5: Introduce physical port PFC access functions
authorAchiad Shochat <achiad@mellanox.com>
Mon, 22 Feb 2016 16:17:24 +0000 (18:17 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 24 Feb 2016 18:50:20 +0000 (13:50 -0500)
Add access functions to set and query a physical port PFC
(Priority Flow Control) parameters.

Signed-off-by: Achiad Shochat <achiad@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlx5/core/port.c
include/linux/mlx5/port.h

index 1e863216ac4ab7a6152e467c6f1e224dd2821786..dae70500b6a90cc3474d5ddd85cddfb0c2f576cf 100644 (file)
@@ -364,3 +364,44 @@ int mlx5_query_port_pause(struct mlx5_core_dev *dev,
        return 0;
 }
 EXPORT_SYMBOL_GPL(mlx5_query_port_pause);
+
+int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx)
+{
+       u32 in[MLX5_ST_SZ_DW(pfcc_reg)];
+       u32 out[MLX5_ST_SZ_DW(pfcc_reg)];
+
+       memset(in, 0, sizeof(in));
+       MLX5_SET(pfcc_reg, in, local_port, 1);
+       MLX5_SET(pfcc_reg, in, pfctx, pfc_en_tx);
+       MLX5_SET(pfcc_reg, in, pfcrx, pfc_en_rx);
+       MLX5_SET_TO_ONES(pfcc_reg, in, prio_mask_tx);
+       MLX5_SET_TO_ONES(pfcc_reg, in, prio_mask_rx);
+
+       return mlx5_core_access_reg(dev, in, sizeof(in), out,
+                                   sizeof(out), MLX5_REG_PFCC, 0, 1);
+}
+EXPORT_SYMBOL_GPL(mlx5_set_port_pfc);
+
+int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx)
+{
+       u32 in[MLX5_ST_SZ_DW(pfcc_reg)];
+       u32 out[MLX5_ST_SZ_DW(pfcc_reg)];
+       int err;
+
+       memset(in, 0, sizeof(in));
+       MLX5_SET(pfcc_reg, in, local_port, 1);
+
+       err = mlx5_core_access_reg(dev, in, sizeof(in), out,
+                                  sizeof(out), MLX5_REG_PFCC, 0, 0);
+       if (err)
+               return err;
+
+       if (pfc_en_tx)
+               *pfc_en_tx = MLX5_GET(pfcc_reg, out, pfctx);
+
+       if (pfc_en_rx)
+               *pfc_en_rx = MLX5_GET(pfcc_reg, out, pfcrx);
+
+       return 0;
+}
+EXPORT_SYMBOL_GPL(mlx5_query_port_pfc);
index 7accd4a65da5c9ff9c14799113b4ffa35226aff3..4b3644caa936f6b464c318687cfe174e1788358e 100644 (file)
@@ -66,4 +66,8 @@ int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
 int mlx5_query_port_pause(struct mlx5_core_dev *dev,
                          u32 *rx_pause, u32 *tx_pause);
 
+int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
+int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
+                       u8 *pfc_en_rx);
+
 #endif /* __MLX5_PORT_H__ */