arm64: dts: rockchip: add more rk3399 iommu nodes

Add VPU/VDEC/IEP/ISP0/ISP1 iommu nodes

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index a0f3b355e97001d54de7975e0718474df7602608..9a084a634f3aa8faef705f0cf7deaeb27123294f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1175,6 +1175,33 @@
                status = "disabled";
        };
 
+       vpu_mmu: iommu@ff650800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff650800 0x0 0x40>;
+               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "vpu_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       vdec_mmu: iommu@ff660480 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "vdec_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       iep_mmu: iommu@ff670800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff670800 0x0 0x40>;
+               interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "iep_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        efuse0: efuse@ff690000 {
                compatible = "rockchip,rk3399-efuse";
                reg = <0x0 0xff690000 0x0 0x80>;
@@ -1548,6 +1575,26 @@
                status = "disabled";
        };
 
+       isp0_mmu: iommu@ff914000 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "isp0_mmu";
+               #iommu-cells = <0>;
+               rockchip,disable-mmu-reset;
+               status = "disabled";
+       };
+
+       isp1_mmu: iommu@ff924000 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
+               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "isp1_mmu";
+               #iommu-cells = <0>;
+               rockchip,disable-mmu-reset;
+               status = "disabled";
+       };
+
        hdmi: hdmi@ff940000 {
                compatible = "rockchip,rk3399-dw-hdmi";
                reg = <0x0 0xff940000 0x0 0x20000>;