This extra clock is needed to access the registers of the I2C controller
used on the Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
commit
1534156e999735fe0befad958e1447600c0c20e7 ("i2c: mv64xxx: Fix clock
resource by adding an optional bus clock")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
#address-cells = <1>;
#size-cells = <0>;
interrupts = <ICU_GRP_NSR 120 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&CP110_LABEL(clk) 1 21>;
+ clock-names = "core", "reg";
+ clocks = <&CP110_LABEL(clk) 1 21>,
+ <&CP110_LABEL(clk) 1 17>;
status = "disabled";
};
#address-cells = <1>;
#size-cells = <0>;
interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&CP110_LABEL(clk) 1 21>;
+ clock-names = "core", "reg";
+ clocks = <&CP110_LABEL(clk) 1 21>,
+ <&CP110_LABEL(clk) 1 17>;
status = "disabled";
};