pwm: lpc32xx: Don't change PWM_ENABLE bit in lpc32xx_pwm_config

lpc32xx_pwm_config() is supposed to set duty_ns and period_ns,
it should not change PWM_ENABLE bit.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index 6b6272f61da5a62dc76c3b22e5c9a714b1c0911f..8272883c0d05f73e63c887aa7b90160e0346e4ae 100644 (file)
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -37,6 +37,7 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
        struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
        unsigned long long c;
        int period_cycles, duty_cycles;
+       u32 val;
 
        c = clk_get_rate(lpc32xx->clk) / 256;
        c = c * period_ns;
@@ -68,8 +69,10 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
                c = 255;
        duty_cycles = 256 - c;
 
-       writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
-               lpc32xx->base + (pwm->hwpwm << 2));
+       val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+       val &= ~0xFFFF;
+       val |= PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles);
+       writel(val, lpc32xx->base + (pwm->hwpwm << 2));
 
        return 0;
 }