arm64: entry.S: convert elX_irq
authorJames Morse <james.morse@arm.com>
Thu, 2 Nov 2017 12:12:41 +0000 (12:12 +0000)
committerWill Deacon <will.deacon@arm.com>
Thu, 2 Nov 2017 15:55:41 +0000 (15:55 +0000)
Following our 'dai' order, irqs should be processed with debug and
serror exceptions unmasked.

Add a helper to unmask these two, (and fiq for good measure).

Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/assembler.h
arch/arm64/kernel/entry.S

index 90d1f01d602f653eb92ba691056e924d7acb12f8..aef72d886677758c76d6b932c863893df7c67b53 100644 (file)
        msr     daif, \tmp
        .endm
 
+       /* IRQ is the lowest priority flag, unconditionally unmask the rest. */
+       .macro enable_da_f
+       msr     daifclr, #(8 | 4 | 1)
+       .endm
+
 /*
  * Enable and disable interrupts.
  */
index a3e6a3954fe0749d9379b30066415b8140bedb2a..55d08072930aae2fd48cade54769226536f75596 100644 (file)
@@ -557,7 +557,7 @@ ENDPROC(el1_sync)
        .align  6
 el1_irq:
        kernel_entry 1
-       enable_dbg
+       enable_da_f
 #ifdef CONFIG_TRACE_IRQFLAGS
        bl      trace_hardirqs_off
 #endif
@@ -766,7 +766,7 @@ ENDPROC(el0_sync)
 el0_irq:
        kernel_entry 0
 el0_irq_naked:
-       enable_dbg
+       enable_da_f
 #ifdef CONFIG_TRACE_IRQFLAGS
        bl      trace_hardirqs_off
 #endif