ARM: dts: STi: Add fake reg property for miphy28lp_phy

Add fake reg property to miphy28lp_phy.
This allows to fix the following warning when compiling
dtb with W=1 option:

arch/arm/boot/dts/stih407-b2120.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property

arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property

arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property

arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 1608c70f05a987dde12c5ec195dd2d3f1e40234e..e279cd07ba672d6cb9d855e43ef69e415ae13ad3 100644 (file)
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -389,12 +389,13 @@
                        reset-names = "global", "port";
                };
 
-               miphy28lp_phy: miphy28lp {
+               miphy28lp_phy: miphy28lp@0 {
                        compatible = "st,miphy28lp-phy";
                        st,syscfg = <&syscfg_core>;
                        #address-cells  = <1>;
                        #size-cells     = <1>;
                        ranges;
+                       reg = <0 0>;
 
                        phy_port0: port@9b22000 {
                                reg = <0x9b22000 0xff>,

diff --git a/arch/arm/boot/dts/stih410-b2260.dts b/arch/arm/boot/dts/stih410-b2260.dts
index 69c2abcaeda86a4fd742fdda0ad31536cd7c832a..cea5c840ca9f61aace908caa65d04932d30fdc18 100644 (file)
--- a/arch/arm/boot/dts/stih410-b2260.dts
+++ b/arch/arm/boot/dts/stih410-b2260.dts
@@ -200,7 +200,7 @@
                        };
                };
 
-               miphy28lp_phy: miphy28lp {
+               miphy28lp_phy: miphy28lp@0 {
 
                        phy_port1: port@9b2a000 {
                                st,osc-force-ext;

diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
index 1ce38ce79952ead0387e747493465f8bac0ad915..be0bbb05c5ec1febaf8073c0b29f419b6a113da3 100644 (file)
--- a/arch/arm/boot/dts/stih418-b2199.dts
+++ b/arch/arm/boot/dts/stih418-b2199.dts
@@ -88,7 +88,7 @@
                        non-removable;
                };
 
-               miphy28lp_phy: miphy28lp {
+               miphy28lp_phy: miphy28lp@0 {
 
                        phy_port0: port@9b22000 {
                                st,osc-rdy;

diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 1fd3a2b5b938286eb0d72bc38708a6e2c9331066..66c1c6a5eb76e9bd35f7ab32b864f54d26d92896 100644 (file)
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -80,7 +80,7 @@
                        st,i2c-min-sda-pulse-width-us = <5>;
                };
 
-               miphy28lp_phy: miphy28lp {
+               miphy28lp_phy: miphy28lp@0 {
 
                        phy_port0: port@9b22000 {
                                st,osc-rdy;