drm/i915/gvt: Fix check error on hws_pga_write() fail message

Fix below check error by using proper failure message output.

drivers/gpu/drm/i915//gvt/handlers.c:1392 hws_pga_write() error: 'vgpu' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915//gvt/handlers.c:1402 hws_pga_write() error: 'vgpu' dereferencing possible ERR_PTR()

Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 7792711e01e3906d649d5389b195a7323aed0cb5..112f2ec7c25f63ada7c656fe86dcd7e8aba69006 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1391,8 +1391,8 @@ static int hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset,
        int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
 
        if (!intel_gvt_ggtt_validate_range(vgpu, value, I915_GTT_PAGE_SIZE)) {
-               gvt_vgpu_err("VM(%d) write invalid HWSP address, reg:0x%x, value:0x%x\n",
-                             vgpu->id, offset, value);
+               gvt_vgpu_err("write invalid HWSP address, reg:0x%x, value:0x%x\n",
+                             offset, value);
                return -EINVAL;
        }
        /*
@@ -1401,8 +1401,8 @@ static int hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset,
         * support BDW, SKL or other platforms with same HWSP registers.
         */
        if (unlikely(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) {
-               gvt_vgpu_err("VM(%d) access unknown hardware status page register:0x%x\n",
-                            vgpu->id, offset);
+               gvt_vgpu_err("access unknown hardware status page register:0x%x\n",
+                            offset);
                return -EINVAL;
        }
        vgpu->hws_pga[ring_id] = value;