ixp4xx: fix bug in Actiontec DTS file
authorLinus Walleij <linusw@kernel.org>
Fri, 2 Jan 2026 20:15:28 +0000 (21:15 +0100)
committerLinus Walleij <linusw@kernel.org>
Sun, 4 Jan 2026 15:51:31 +0000 (16:51 +0100)
This misassigned ethernet port bug was merged in the upstream
kernel.

Link: https://github.com/openwrt/openwrt/pull/21367
Signed-off-by: Linus Walleij <linusw@kernel.org>
target/linux/ixp4xx/patches-6.12/0006-v6.19-ARM-dts-ixp4xx-Fix-up-Actiontec-MI424WR-DTS-files.patch [new file with mode: 0644]

diff --git a/target/linux/ixp4xx/patches-6.12/0006-v6.19-ARM-dts-ixp4xx-Fix-up-Actiontec-MI424WR-DTS-files.patch b/target/linux/ixp4xx/patches-6.12/0006-v6.19-ARM-dts-ixp4xx-Fix-up-Actiontec-MI424WR-DTS-files.patch
new file mode 100644 (file)
index 0000000..2cdabfa
--- /dev/null
@@ -0,0 +1,70 @@
+From ececfba255bf3616301419e47a5c824e04b60ab8 Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linusw@kernel.org>
+Date: Thu, 11 Dec 2025 14:05:01 +0100
+Subject: [PATCH] ARM: dts: ixp4xx: Fix up Actiontec MI424WR DTS files
+
+The KS8995 switch was unconditionally wired to EthC (eth1)
+on both MI424WR variants, this is wrong: the D revision has
+the switch connected to EthB (eth0) so pull this assingment
+out of the generic MI424WR DTSI file and make it a property
+of the respective variants instead.
+
+Signed-off-by: Linus Walleij <linusw@kernel.org>
+Link: https://patch.msgid.link/20251211-ixp4xx-actiontec-dts-fix-v1-1-97af8e79d474@kernel.org
+Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
+---
+ .../intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts   | 11 +++++++++++
+ .../intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts    | 11 +++++++++++
+ .../dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi |  1 -
+ 3 files changed, 22 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts
++++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-ac.dts
+@@ -12,6 +12,17 @@
+       model = "Actiontec MI424WR rev A/C";
+       compatible = "actiontec,mi424wr-ac", "intel,ixp42x";
++      /* Connect the switch to EthC */
++      spi {
++              ethernet-switch@0 {
++                      ethernet-ports {
++                              ethernet-port@4 {
++                                      ethernet = <&ethc>;
++                              };
++                      };
++              };
++      };
++
+       soc {
+               /* EthB used for WAN */
+               ethernet@c8009000 {
+--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts
++++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts
+@@ -12,6 +12,17 @@
+       model = "Actiontec MI424WR rev D";
+       compatible = "actiontec,mi424wr-d", "intel,ixp42x";
++      /* Connect the switch to EthB */
++      spi {
++              ethernet-switch@0 {
++                      ethernet-ports {
++                              ethernet-port@4 {
++                                      ethernet = <&ethb>;
++                              };
++                      };
++              };
++      };
++
+       soc {
+               /* EthB used for LAN */
+               ethernet@c8009000 {
+--- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
++++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi
+@@ -152,7 +152,6 @@
+                               };
+                               ethernet-port@4 {
+                                       reg = <4>;
+-                                      ethernet = <&ethc>;
+                                       phy-mode = "mii";
+                                       fixed-link {
+                                               speed = <100>;