MIPS: Add CPU identifiers and probing for Cavium CN73xx and CNF75xx processors.
authorDavid Daney <david.daney@cavium.com>
Mon, 1 Feb 2016 22:43:41 +0000 (14:43 -0800)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:01:38 +0000 (14:01 +0200)
Add new processor identifiers for Cavium CN73xx and CNF75xx
processors, and probe for them in cpu-probe.c

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12311/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cpu.h
arch/mips/kernel/cpu-probe.c

index a97ca97285ecf1dd897c9c7a9610209e15ad70c7..7bea0f3bf9eefd6151ec640cef590d413a807d10 100644 (file)
 #define PRID_IMP_CAVIUM_CNF71XX 0x9400
 #define PRID_IMP_CAVIUM_CN78XX 0x9500
 #define PRID_IMP_CAVIUM_CN70XX 0x9600
+#define PRID_IMP_CAVIUM_CN73XX 0x9700
+#define PRID_IMP_CAVIUM_CNF75XX 0x9800
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*
index b725b713b9f8b56e3763784c18b0550dffd77b6d..9ad6157e23def08578813ea38f53f66a3d9ea9b6 100644 (file)
@@ -1481,6 +1481,8 @@ platform:
                set_elf_platform(cpu, "octeon2");
                break;
        case PRID_IMP_CAVIUM_CN70XX:
+       case PRID_IMP_CAVIUM_CN73XX:
+       case PRID_IMP_CAVIUM_CNF75XX:
        case PRID_IMP_CAVIUM_CN78XX:
                c->cputype = CPU_CAVIUM_OCTEON3;
                __cpu_name[cpu] = "Cavium Octeon III";