drm/amdgpu: align GTT start to 4GB v2

For VCE to work properly the start of the GTT space must be aligned to a
4GB boundary.

v2: add comment why we do this

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a81743d06bb0b47d7c8adbece083bfdefb206b6b..a43d096ebb52e38331203ae321f68f177a8106f2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -622,7 +622,10 @@ void amdgpu_gart_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
                        dev_warn(adev->dev, "limiting GTT\n");
                        mc->gart_size = size_af;
                }
-               mc->gart_start = mc->vram_end + 1;
+               /* VCE doesn't like it when BOs cross a 4GB segment, so align
+                * the GART base on a 4GB boundary as well.
+                */
+               mc->gart_start = ALIGN(mc->vram_end + 1, 0x100000000ULL);
        }
        mc->gart_end = mc->gart_start + mc->gart_size - 1;
        dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",