ARM: dts: add mct device tree node for all supported Exynos SoC's
authorThomas Abraham <thomas.abraham@linaro.org>
Sat, 9 Mar 2013 07:12:35 +0000 (16:12 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Sat, 9 Mar 2013 07:18:13 +0000 (16:18 +0900)
Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412
and Exynos5250.

Cc: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos4210.dtsi
arch/arm/boot/dts/exynos4212.dtsi
arch/arm/boot/dts/exynos4412.dtsi
arch/arm/boot/dts/exynos5250.dtsi

index 2feffc70814cb9223f052528752be9abeb66c07a..49a2786e00b9737042c5e96f6a3abf030d3f116f 100644 (file)
                             <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
        };
 
+       mct@10050000 {
+               compatible = "samsung,exynos4210-mct";
+               reg = <0x10050000 0x800>;
+               interrupt-controller;
+               #interrups-cells = <2>;
+               interrupt-parent = <&mct_map>;
+               interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                            <4 0>, <5 0>;
+
+               mct_map: mct-map {
+                       #interrupt-cells = <2>;
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       interrupt-map = <0x0 0 &gic 0 57 0>,
+                                       <0x1 0 &gic 0 69 0>,
+                                       <0x2 0 &combiner 12 6>,
+                                       <0x3 0 &combiner 12 7>,
+                                       <0x4 0 &gic 0 42 0>,
+                                       <0x5 0 &gic 0 48 0>;
+               };
+       };
+
        pinctrl_0: pinctrl@11400000 {
                compatible = "samsung,exynos4210-pinctrl";
                reg = <0x11400000 0x1000>;
index c6ae2005961f2f55bc4cb01bf920e15e83cc1244..36d4299789ef163474139cf4329b179ea7ca4eba 100644 (file)
        gic:interrupt-controller@10490000 {
                cpu-offset = <0x8000>;
        };
+
+       mct@10050000 {
+               compatible = "samsung,exynos4412-mct";
+               reg = <0x10050000 0x800>;
+               interrupt-controller;
+               #interrups-cells = <2>;
+               interrupt-parent = <&mct_map>;
+               interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                            <4 0>, <5 0>;
+
+               mct_map: mct-map {
+                       #interrupt-cells = <2>;
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       interrupt-map = <0x0 0 &gic 0 57 0>,
+                                       <0x1 0 &combiner 12 5>,
+                                       <0x2 0 &combiner 12 6>,
+                                       <0x3 0 &combiner 12 7>,
+                                       <0x4 0 &gic 1 12 0>,
+                                       <0x5 0 &gic 1 12 0>;
+               };
+       };
 };
index d7dfe312772a6e5b26a660d2fcf90b7dcdc8badf..821c9fdd1e3b06804221932d241976c72d9a4523 100644 (file)
        gic:interrupt-controller@10490000 {
                cpu-offset = <0x4000>;
        };
+
+       mct@10050000 {
+               compatible = "samsung,exynos4412-mct";
+               reg = <0x10050000 0x800>;
+               interrupt-controller;
+               #interrups-cells = <2>;
+               interrupt-parent = <&mct_map>;
+               interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                            <4 0>, <5 0>, <6 0>, <7 0>;
+
+               mct_map: mct-map {
+                       #interrupt-cells = <2>;
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       interrupt-map = <0x0 0 &gic 0 57 0>,
+                                       <0x1 0 &combiner 12 5>,
+                                       <0x2 0 &combiner 12 6>,
+                                       <0x3 0 &combiner 12 7>,
+                                       <0x4 0 &gic 1 12 0>,
+                                       <0x5 0 &gic 1 12 0>,
+                                       <0x6 0 &gic 1 12 0>,
+                                       <0x7 0 &gic 1 12 0>;
+               };
+       };
 };
index b1ac73e21c80da0de48e6e9d70a585c62c243706..c60108e0d27e148294533347a9dbe7d34b7ba4a4 100644 (file)
                             <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
        };
 
+       mct@101C0000 {
+               compatible = "samsung,exynos4210-mct";
+               reg = <0x101C0000 0x800>;
+               interrupt-controller;
+               #interrups-cells = <2>;
+               interrupt-parent = <&mct_map>;
+               interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+                            <4 0>, <5 0>;
+
+               mct_map: mct-map {
+                       #interrupt-cells = <2>;
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       interrupt-map = <0x0 0 &combiner 23 3>,
+                                       <0x1 0 &combiner 23 4>,
+                                       <0x2 0 &combiner 25 2>,
+                                       <0x3 0 &combiner 25 3>,
+                                       <0x4 0 &gic 0 120 0>,
+                                       <0x5 0 &gic 0 121 0>;
+               };
+       };
+
        watchdog {
                compatible = "samsung,s3c2410-wdt";
                reg = <0x101D0000 0x100>;