};
static struct plat_sci_port scif0_platform_data = {
- .port_reg = 0xa4000136,
.type = PORT_SCI,
.ops = &sh770x_sci_port_ops,
.regshift = 1,
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709)
static struct plat_sci_port scif2_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.type = PORT_IRDA,
.ops = &sh770x_sci_port_ops,
.regshift = 1,
};
static struct plat_sci_port sci_platform_data = {
- .port_reg = 0xffe0001C,
.type = PORT_SCI,
.regshift = 2,
};
#include <asm/clock.h>
static struct plat_sci_port scif0_platform_data = {
- .port_reg = 0xa405013e,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
};
/* Serial */
static struct plat_sci_port scif0_platform_data = {
- .port_reg = 0xa4050160,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
};
static struct plat_sci_port scif1_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
};
static struct plat_sci_port scif2_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
};
static struct plat_sci_port scif3_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.sampling_rate = 8,
.type = PORT_SCIFA,
};
static struct plat_sci_port scif4_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.sampling_rate = 8,
.type = PORT_SCIFA,
};
static struct plat_sci_port scif5_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.sampling_rate = 8,
.type = PORT_SCIFA,
/* Serial */
static struct plat_sci_port scif0_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
};
static struct plat_sci_port scif1_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
};
static struct plat_sci_port scif2_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_REIE,
.type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
};
static struct plat_sci_port scif3_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.sampling_rate = 8,
.type = PORT_SCIFA,
};
};
static struct plat_sci_port scif4_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.sampling_rate = 8,
.type = PORT_SCIFA,
};
};
static struct plat_sci_port scif5_platform_data = {
- .port_reg = SCIx_NOT_SUPPORTED,
.sampling_rate = 8,
.type = PORT_SCIFA,
};