arm64: allwinner: a64: add Ethernet PHY regulator for several boards
authorIcenowy Zheng <icenowy@aosc.io>
Fri, 10 Nov 2017 09:26:54 +0000 (17:26 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 27 Nov 2017 07:47:31 +0000 (08:47 +0100)
On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
on the AXP803 PMIC.

Add phy-handle property to these boards' emac node.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts

index 45bdbfb961261becf2fb940fb9da19ee0f99560a..4a8d3f83a36eabc50134577306c06febffb9bed8 100644 (file)
@@ -75,6 +75,7 @@
        pinctrl-0 = <&rgmii_pins>;
        phy-mode = "rgmii";
        phy-handle = <&ext_rgmii_phy>;
+       phy-supply = <&reg_dc1sw>;
        status = "okay";
 };
 
index 806442d3e846881d01e3c971da41af1db869b14f..604cdaedac38eed479a8f24a88efbc4fddc2676e 100644 (file)
@@ -77,6 +77,7 @@
        pinctrl-0 = <&rmii_pins>;
        phy-mode = "rmii";
        phy-handle = <&ext_rmii_phy1>;
+       phy-supply = <&reg_dc1sw>;
        status = "okay";
 
 };
index 0eb2acedf8c3bc5ff2b4bbde4cddfde4d8c204ad..a053a6ac52676c644060bc9ba9488368a945c3e8 100644 (file)
@@ -82,6 +82,7 @@
        pinctrl-0 = <&rgmii_pins>;
        phy-mode = "rgmii";
        phy-handle = <&ext_rgmii_phy>;
+       phy-supply = <&reg_dc1sw>;
        status = "okay";
 };