drm/amd/display: Expose bunch of functions from dcn10_hw_sequencer

v2: Remove spurious newline changes

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 944275a50c0a60f1f833388b60918d688626c70f..a9942fd5f34e67ad2893d064eddcc6f5a0a96856 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -834,7 +834,7 @@ static bool dcn10_hw_wa_force_recovery(struct dc *dc)
 }
 
 
-static void dcn10_verify_allow_pstate_change_high(struct dc *dc)
+void dcn10_verify_allow_pstate_change_high(struct dc *dc)
 {
        static bool should_log_hw_state; /* prevent hw state log by default */
 
@@ -1848,8 +1848,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state)
                dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);
 }
 
-
-static void update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
+static void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
 {
        struct hubp *hubp = pipe_ctx->plane_res.hubp;
        struct mpcc_blnd_cfg blnd_cfg;
@@ -1994,7 +1993,7 @@ static void update_dchubp_dpp(
 
        if (plane_state->update_flags.bits.full_update ||
                plane_state->update_flags.bits.per_pixel_alpha_change)
-               update_mpcc(dc, pipe_ctx);
+               dc->hwss.update_mpcc(dc, pipe_ctx);
 
        if (plane_state->update_flags.bits.full_update ||
                plane_state->update_flags.bits.per_pixel_alpha_change ||
@@ -2104,6 +2103,33 @@ static void set_hdr_multiplier(struct pipe_ctx *pipe_ctx)
                        pipe_ctx->plane_res.dpp, hw_mult);
 }
 
+void dcn10_program_pipe(
+               struct dc *dc,
+               struct pipe_ctx *pipe_ctx,
+               struct dc_state *context)
+{
+       if (pipe_ctx->plane_state->update_flags.bits.full_update)
+               dcn10_enable_plane(dc, pipe_ctx, context);
+
+       update_dchubp_dpp(dc, pipe_ctx, context);
+
+       set_hdr_multiplier(pipe_ctx);
+
+       if (pipe_ctx->plane_state->update_flags.bits.full_update ||
+                       pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
+                       pipe_ctx->plane_state->update_flags.bits.gamma_change)
+               dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
+
+       /* dcn10_translate_regamma_to_hw_format takes 750us to finish
+        * only do gamma programming for full update.
+        * TODO: This can be further optimized/cleaned up
+        * Always call this for now since it does memcmp inside before
+        * doing heavy calculation and programming
+        */
+       if (pipe_ctx->plane_state->update_flags.bits.full_update)
+               dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
+}
+
 static void program_all_pipe_in_tree(
                struct dc *dc,
                struct pipe_ctx *pipe_ctx,
@@ -2125,26 +2151,7 @@ static void program_all_pipe_in_tree(
        }
 
        if (pipe_ctx->plane_state != NULL) {
-               if (pipe_ctx->plane_state->update_flags.bits.full_update)
-                       dcn10_enable_plane(dc, pipe_ctx, context);
-
-               update_dchubp_dpp(dc, pipe_ctx, context);
-
-               set_hdr_multiplier(pipe_ctx);
-
-               if (pipe_ctx->plane_state->update_flags.bits.full_update ||
-                               pipe_ctx->plane_state->update_flags.bits.in_transfer_func_change ||
-                               pipe_ctx->plane_state->update_flags.bits.gamma_change)
-                       dc->hwss.set_input_transfer_func(pipe_ctx, pipe_ctx->plane_state);
-
-               /* dcn10_translate_regamma_to_hw_format takes 750us to finish
-                * only do gamma programming for full update.
-                * TODO: This can be further optimized/cleaned up
-                * Always call this for now since it does memcmp inside before
-                * doing heavy calculation and programming
-                */
-               if (pipe_ctx->plane_state->update_flags.bits.full_update)
-                       dc->hwss.set_output_transfer_func(pipe_ctx, pipe_ctx->stream);
+               dcn10_program_pipe(dc, pipe_ctx, context);
        }
 
        if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) {
@@ -2269,7 +2276,7 @@ static void dcn10_apply_ctx_for_surface(
                        old_pipe_ctx->plane_state &&
                        old_pipe_ctx->stream_res.tg == tg) {
 
-                       hwss1_plane_atomic_disconnect(dc, old_pipe_ctx);
+                       dc->hwss.plane_atomic_disconnect(dc, old_pipe_ctx);
                        removed_pipe[i] = true;
 
                        DC_LOG_DC("Reset mpcc for pipe %d\n",
@@ -2555,7 +2562,9 @@ static const struct hw_sequencer_funcs dcn10_funcs = {
        .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
        .apply_ctx_for_surface = dcn10_apply_ctx_for_surface,
        .update_plane_addr = dcn10_update_plane_addr,
+       .plane_atomic_disconnect = hwss1_plane_atomic_disconnect,
        .update_dchub = dcn10_update_dchub,
+       .update_mpcc = dcn10_update_mpcc,
        .update_pending_status = dcn10_update_pending_status,
        .set_input_transfer_func = dcn10_set_input_transfer_func,
        .set_output_transfer_func = dcn10_set_output_transfer_func,

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
index 44f734b73f9ea41d75e65c49131d6f4b4a27dfdd..7139fb73e966eeaf79823c6204b9fc34ccd5d6da 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
@@ -39,4 +39,11 @@ bool is_rgb_cspace(enum dc_color_space output_color_space);
 
 void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);
 
+void dcn10_verify_allow_pstate_change_high(struct dc *dc);
+
+void dcn10_program_pipe(
+               struct dc *dc,
+               struct pipe_ctx *pipe_ctx,
+               struct dc_state *context);
+
 #endif /* __DC_HWSS_DCN10_H__ */

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 2506601120afab6ec9f895b48e837a41c616fdb5..c2277d1e195b4544635aa0f218b95884af595c3b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -102,10 +102,18 @@ struct hw_sequencer_funcs {
                const struct dc *dc,
                struct pipe_ctx *pipe_ctx);
 
+       void (*plane_atomic_disconnect)(
+               struct dc *dc,
+               struct pipe_ctx *pipe_ctx);
+
        void (*update_dchub)(
                struct dce_hwseq *hws,
                struct dchub_init_data *dh_data);
 
+       void (*update_mpcc)(
+               struct dc *dc,
+               struct pipe_ctx *pipe_ctx);
+
        void (*update_pending_status)(
                        struct pipe_ctx *pipe_ctx);