BUILD_DEVICES:=sun8i-h3-orangepi-one
endef
+define U-Boot/orangepi_one_plus
+ BUILD_SUBTARGET:=cortexa53
+ NAME:=Orange Pi One Plus (H6)
+ BUILD_DEVICES:=sun50i-h6-orangepi-one-plus
+endef
+
define U-Boot/orangepi_pc
BUILD_SUBTARGET:=cortexa7
NAME:=Orange Pi PC (H3)
orangepi_zero \
orangepi_r1 \
orangepi_one \
+ orangepi_one_plus \
orangepi_pc \
orangepi_pc_plus \
orangepi_plus \
TARGET_DEVICES += sun50i-h5-nanopi-neo2
+define Device/sun50i-h6-orangepi-one-plus
+ DEVICE_TITLE:=Xunlong Orange Pi One Plus
+ SUPPORTED_DEVICES:=xunlong,orangepi-one-plus
+ SUNXI_DTS:=allwinner/sun50i-h6-orangepi-one-plus
+ KERNEL_NAME := Image
+ KERNEL := kernel-bin
+endef
+
+TARGET_DEVICES += sun50i-h6-orangepi-one-plus
+
define Device/sun50i-a64-pine64-plus
DEVICE_VENDOR := Pine64
DEVICE_MODEL := Pine64+
--- /dev/null
+From b2ad66f546c94ead96167d52eb1dfb1ddd51092c Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.io>
+Date: Sun, 2 Sep 2018 09:26:18 +0200
+Subject: [PATCH] arm64: dts: allwinner: h6: add system controller device tree
+ node
+
+As we have already binding for the H6 system controller, add its node
+to the device tree.
+
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+[fixed compatible string]
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+Reviewed-by: Chen-Yu Tsai <wens@csie.org>
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 23 ++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index cfa5fffcf62b4..040828d2e2c09 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -92,6 +92,29 @@
+ #size-cells = <1>;
+ ranges;
+
++ syscon: syscon@3000000 {
++ compatible = "allwinner,sun50i-h6-system-control",
++ "allwinner,sun50i-a64-system-control";
++ reg = <0x03000000 0x1000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++
++ sram_c: sram@28000 {
++ compatible = "mmio-sram";
++ reg = <0x00028000 0x1e000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges = <0 0x00028000 0x1e000>;
++
++ de2_sram: sram-section@0 {
++ compatible = "allwinner,sun50i-h6-sram-c",
++ "allwinner,sun50i-a64-sram-c";
++ reg = <0x0000 0x1e000>;
++ };
++ };
++ };
++
+ ccu: clock@3001000 {
+ compatible = "allwinner,sun50i-h6-ccu";
+ reg = <0x03001000 0x1000>;
--- /dev/null
+From 209065c5fd72300c09b400369956c7bb4476147a Mon Sep 17 00:00:00 2001
+From: Jernej Skrabec <jernej.skrabec@siol.net>
+Date: Sun, 4 Nov 2018 19:27:04 +0100
+Subject: [PATCH] arm64: dts: allwinner: h6: Add HDMI pipeline
+
+This commit adds all entries needed for HDMI to function properly.
+
+Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
+[added DE3 bus]
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 201 +++++++++++++++++++
+ 1 file changed, 201 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index 11f7ce7d18766..45bbb51164467 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -6,8 +6,11 @@
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/sun50i-h6-ccu.h>
+ #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
++#include <dt-bindings/clock/sun8i-de2.h>
++#include <dt-bindings/clock/sun8i-tcon-top.h>
+ #include <dt-bindings/reset/sun50i-h6-ccu.h>
+ #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
++#include <dt-bindings/reset/sun8i-de2.h>
+
+ / {
+ interrupt-parent = <&gic>;
+@@ -47,6 +50,12 @@
+ };
+ };
+
++ de: display-engine {
++ compatible = "allwinner,sun50i-h6-display-engine";
++ allwinner,pipelines = <&mixer0>;
++ status = "disabled";
++ };
++
+ iosc: internal-osc-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+@@ -92,6 +101,51 @@
+ #size-cells = <1>;
+ ranges;
+
++ display-engine@1000000 {
++ compatible = "allwinner,sun50i-h6-de3",
++ "allwinner,sun50i-a64-de2";
++ reg = <0x1000000 0x400000>;
++ allwinner,sram = <&de2_sram 1>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges = <0 0x1000000 0x400000>;
++
++ display_clocks: clock@0 {
++ compatible = "allwinner,sun50i-h6-de3-clk";
++ reg = <0x0 0x10000>;
++ clocks = <&ccu CLK_DE>,
++ <&ccu CLK_BUS_DE>;
++ clock-names = "mod",
++ "bus";
++ resets = <&ccu RST_BUS_DE>;
++ #clock-cells = <1>;
++ #reset-cells = <1>;
++ };
++
++ mixer0: mixer@100000 {
++ compatible = "allwinner,sun50i-h6-de3-mixer-0";
++ reg = <0x100000 0x100000>;
++ clocks = <&display_clocks CLK_BUS_MIXER0>,
++ <&display_clocks CLK_MIXER0>;
++ clock-names = "bus",
++ "mod";
++ resets = <&display_clocks RST_MIXER0>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mixer0_out: port@1 {
++ reg = <1>;
++
++ mixer0_out_tcon_top_mixer0: endpoint {
++ remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
++ };
++ };
++ };
++ };
++ };
++
+ syscon: syscon@3000000 {
+ compatible = "allwinner,sun50i-h6-system-control",
+ "allwinner,sun50i-a64-system-control";
+@@ -157,6 +211,11 @@
+ drive-strength = <40>;
+ };
+
++ hdmi_pins: hdmi-pins {
++ pins = "PH8", "PH9", "PH10";
++ function = "hdmi";
++ };
++
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
+@@ -286,6 +345,148 @@
+ };
+ };
+
++ hdmi: hdmi@6000000 {
++ compatible = "allwinner,sun50i-h6-dw-hdmi";
++ reg = <0x06000000 0x10000>;
++ reg-io-width = <1>;
++ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
++ <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
++ <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
++ clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
++ "hdcp-bus";
++ resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
++ reset-names = "ctrl", "hdcp";
++ phys = <&hdmi_phy>;
++ phy-names = "hdmi-phy";
++ pinctrl-names = "default";
++ pinctrl-0 = <&hdmi_pins>;
++ status = "disabled";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ hdmi_in: port@0 {
++ reg = <0>;
++
++ hdmi_in_tcon_top: endpoint {
++ remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
++ };
++ };
++
++ hdmi_out: port@1 {
++ reg = <1>;
++ };
++ };
++ };
++
++ hdmi_phy: hdmi-phy@6010000 {
++ compatible = "allwinner,sun50i-h6-hdmi-phy";
++ reg = <0x06010000 0x10000>;
++ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
++ clock-names = "bus", "mod";
++ resets = <&ccu RST_BUS_HDMI>;
++ reset-names = "phy";
++ #phy-cells = <0>;
++ };
++
++ tcon_top: tcon-top@6510000 {
++ compatible = "allwinner,sun50i-h6-tcon-top";
++ reg = <0x06510000 0x1000>;
++ clocks = <&ccu CLK_BUS_TCON_TOP>,
++ <&ccu CLK_TCON_TV0>;
++ clock-names = "bus",
++ "tcon-tv0";
++ clock-output-names = "tcon-top-tv0";
++ resets = <&ccu RST_BUS_TCON_TOP>;
++ reset-names = "rst";
++ #clock-cells = <1>;
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ tcon_top_mixer0_in: port@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++
++ tcon_top_mixer0_in_mixer0: endpoint@0 {
++ reg = <0>;
++ remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
++ };
++ };
++
++ tcon_top_mixer0_out: port@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++
++ tcon_top_mixer0_out_tcon_tv: endpoint@2 {
++ reg = <2>;
++ remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
++ };
++ };
++
++ tcon_top_hdmi_in: port@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++
++ tcon_top_hdmi_in_tcon_tv: endpoint@0 {
++ reg = <0>;
++ remote-endpoint = <&tcon_tv_out_tcon_top>;
++ };
++ };
++
++ tcon_top_hdmi_out: port@5 {
++ reg = <5>;
++
++ tcon_top_hdmi_out_hdmi: endpoint {
++ remote-endpoint = <&hdmi_in_tcon_top>;
++ };
++ };
++ };
++ };
++
++ tcon_tv: lcd-controller@6515000 {
++ compatible = "allwinner,sun50i-h6-tcon-tv",
++ "allwinner,sun8i-r40-tcon-tv";
++ reg = <0x06515000 0x1000>;
++ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_TCON_TV0>,
++ <&tcon_top CLK_TCON_TOP_TV0>;
++ clock-names = "ahb",
++ "tcon-ch1";
++ resets = <&ccu RST_BUS_TCON_TV0>;
++ reset-names = "lcd";
++
++ ports {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ tcon_tv_in: port@0 {
++ reg = <0>;
++
++ tcon_tv_in_tcon_top_mixer0: endpoint {
++ remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
++ };
++ };
++
++ tcon_tv_out: port@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++
++ tcon_tv_out_tcon_top: endpoint@1 {
++ reg = <1>;
++ remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
++ };
++ };
++ };
++ };
++
+ r_ccu: clock@7010000 {
+ compatible = "allwinner,sun50i-h6-r-ccu";
+ reg = <0x07010000 0x400>;
--- /dev/null
+From c8ced5516d2340641a676d6f139577d45bcb4e56 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.io>
+Date: Sat, 3 Nov 2018 20:32:37 +0800
+Subject: [PATCH] arm64: allwinner: h6: add EMAC device nodes
+
+Allwinner H6 SoC has an EMAC like the one in A64.
+
+Add device tree nodes for the H6 DTSI file.
+
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 28 ++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index 040828d2e2c09..11f7ce7d18766 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -149,6 +149,14 @@
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
++ ext_rgmii_pins: rgmii_pins {
++ pins = "PD0", "PD1", "PD2", "PD3", "PD4",
++ "PD5", "PD7", "PD8", "PD9", "PD10",
++ "PD11", "PD12", "PD13", "PD19", "PD20";
++ function = "emac";
++ drive-strength = <40>;
++ };
++
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
+@@ -258,6 +266,26 @@
+ status = "disabled";
+ };
+
++ emac: ethernet@5020000 {
++ compatible = "allwinner,sun50i-a64-emac",
++ "allwinner,sun50i-h6-emac";
++ syscon = <&syscon>;
++ reg = <0x05020000 0x10000>;
++ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "macirq";
++ resets = <&ccu RST_BUS_EMAC>;
++ reset-names = "stmmaceth";
++ clocks = <&ccu CLK_BUS_EMAC>;
++ clock-names = "stmmaceth";
++ status = "disabled";
++
++ mdio: mdio {
++ compatible = "snps,dwmac-mdio";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++ };
++
+ r_ccu: clock@7010000 {
+ compatible = "allwinner,sun50i-h6-r-ccu";
+ reg = <0x07010000 0x400>;
--- /dev/null
+From 0b1ea6f3573a5f68c9a79729c0e4d78c1d1bef36 Mon Sep 17 00:00:00 2001
+From: Jagan Teki <jagan@amarulasolutions.com>
+Date: Sat, 28 Jul 2018 23:56:15 +0530
+Subject: [PATCH] arm64: dts: allwinner: h6: Add OrangePi One Plus initial
+ support
+
+OrangePi One Plus is Allwinner H6 based open-source SBC,
+which support:
+- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
+- GPU Mali-T720
+- 1GB LPDDR3 RAM
+- AXP805 PMIC
+- 1Gbps GMAC via RTL8211
+- USB 2.0 Host, OTG
+- HDMI port
+- 5V/2A DC power supply
+
+Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
+Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ arch/arm64/boot/dts/allwinner/Makefile | 1 +
+ .../allwinner/sun50i-h6-orangepi-one-plus.dts | 150 ++++++++++++++++++
+ 2 files changed, 151 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+index b7034327b28bc..e12b3f53ffd70 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -16,4 +16,5 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
+new file mode 100644
+index 0000000000000..0612c19cd9943
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
+@@ -0,0 +1,150 @@
++// SPDX-License-Identifier: (GPL-2.0+ or MIT)
++/*
++ * Copyright (C) 2018 Amarula Solutions
++ * Author: Jagan Teki <jagan@amarulasolutions.com>
++ */
++
++/dts-v1/;
++
++#include "sun50i-h6.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "OrangePi One Plus";
++ compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
++
++ aliases {
++ serial0 = &uart0;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++};
++
++&mmc0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc0_pins>;
++ vmmc-supply = <®_cldo1>;
++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
++ bus-width = <4>;
++ status = "okay";
++};
++
++&r_i2c {
++ status = "okay";
++
++ axp805: pmic@36 {
++ compatible = "x-powers,axp805", "x-powers,axp806";
++ reg = <0x36>;
++ interrupt-parent = <&r_intc>;
++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ interrupt-controller;
++ #interrupt-cells = <1>;
++ x-powers,self-working-mode;
++
++ regulators {
++ reg_aldo1: aldo1 {
++ regulator-always-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-pl";
++ };
++
++ reg_aldo2: aldo2 {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-ac200";
++ };
++
++ reg_aldo3: aldo3 {
++ regulator-always-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc25-dram";
++ };
++
++ reg_bldo1: bldo1 {
++ regulator-always-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc-bias-pll";
++ };
++
++ reg_bldo2: bldo2 {
++ regulator-always-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc-efuse-pcie-hdmi-io";
++ };
++
++ reg_bldo3: bldo3 {
++ regulator-always-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc-dcxoio";
++ };
++
++ bldo4 {
++ /* unused */
++ };
++
++ reg_cldo1: cldo1 {
++ regulator-always-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-3v3";
++ };
++
++ reg_cldo2: cldo2 {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-wifi-1";
++ };
++
++ reg_cldo3: cldo3 {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-wifi-2";
++ };
++
++ reg_dcdca: dcdca {
++ regulator-always-on;
++ regulator-min-microvolt = <810000>;
++ regulator-max-microvolt = <1080000>;
++ regulator-name = "vdd-cpu";
++ };
++
++ reg_dcdcc: dcdcc {
++ regulator-min-microvolt = <810000>;
++ regulator-max-microvolt = <1080000>;
++ regulator-name = "vdd-gpu";
++ };
++
++ reg_dcdcd: dcdcd {
++ regulator-always-on;
++ regulator-min-microvolt = <960000>;
++ regulator-max-microvolt = <960000>;
++ regulator-name = "vdd-sys";
++ };
++
++ reg_dcdce: dcdce {
++ regulator-always-on;
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-name = "vcc-dram";
++ };
++
++ sw {
++ /* unused */
++ };
++ };
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_ph_pins>;
++ status = "okay";
++};
--- /dev/null
+From f0c083b88aa74e273c1c708ccc2d7ff0820cc319 Mon Sep 17 00:00:00 2001
+From: Jagan Teki <jagan@amarulasolutions.com>
+Date: Mon, 5 Nov 2018 13:18:41 +0530
+Subject: [PATCH] arm64: allwinner: h6: Add common orangepi nodes into dtsi
+
+Based on the information from hardware schematics and orangepi
+vendor orangepi H6 boards, One Plus and Lite2 shares common nodes
+like axp805, uart, mmc0 etc. The common differences between them is
+- One Plus, has Ethernet
+- Lite2, has Wifi, USB3, CSI port.
+
+So, add common orangepi nodes into sun50i-h6-orangepi.dtsi so-that
+it case use on respective orangepi h6 board dts files.
+
+Cc: zhaoyifan <zhao_steven@263.net>
+Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ .../allwinner/sun50i-h6-orangepi-one-plus.dts | 140 +---------------
+ .../dts/allwinner/sun50i-h6-orangepi.dtsi | 150 ++++++++++++++++++
+ 2 files changed, 151 insertions(+), 139 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
+index 0612c19cd9943..12e17567ab562 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts
+@@ -4,147 +4,9 @@
+ * Author: Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+-/dts-v1/;
+-
+-#include "sun50i-h6.dtsi"
+-
+-#include <dt-bindings/gpio/gpio.h>
++#include "sun50i-h6-orangepi.dtsi"
+
+ / {
+ model = "OrangePi One Plus";
+ compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
+-
+- aliases {
+- serial0 = &uart0;
+- };
+-
+- chosen {
+- stdout-path = "serial0:115200n8";
+- };
+-};
+-
+-&mmc0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&mmc0_pins>;
+- vmmc-supply = <®_cldo1>;
+- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+- bus-width = <4>;
+- status = "okay";
+-};
+-
+-&r_i2c {
+- status = "okay";
+-
+- axp805: pmic@36 {
+- compatible = "x-powers,axp805", "x-powers,axp806";
+- reg = <0x36>;
+- interrupt-parent = <&r_intc>;
+- interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+- interrupt-controller;
+- #interrupt-cells = <1>;
+- x-powers,self-working-mode;
+-
+- regulators {
+- reg_aldo1: aldo1 {
+- regulator-always-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc-pl";
+- };
+-
+- reg_aldo2: aldo2 {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc-ac200";
+- };
+-
+- reg_aldo3: aldo3 {
+- regulator-always-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc25-dram";
+- };
+-
+- reg_bldo1: bldo1 {
+- regulator-always-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc-bias-pll";
+- };
+-
+- reg_bldo2: bldo2 {
+- regulator-always-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc-efuse-pcie-hdmi-io";
+- };
+-
+- reg_bldo3: bldo3 {
+- regulator-always-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc-dcxoio";
+- };
+-
+- bldo4 {
+- /* unused */
+- };
+-
+- reg_cldo1: cldo1 {
+- regulator-always-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc-3v3";
+- };
+-
+- reg_cldo2: cldo2 {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc-wifi-1";
+- };
+-
+- reg_cldo3: cldo3 {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc-wifi-2";
+- };
+-
+- reg_dcdca: dcdca {
+- regulator-always-on;
+- regulator-min-microvolt = <810000>;
+- regulator-max-microvolt = <1080000>;
+- regulator-name = "vdd-cpu";
+- };
+-
+- reg_dcdcc: dcdcc {
+- regulator-min-microvolt = <810000>;
+- regulator-max-microvolt = <1080000>;
+- regulator-name = "vdd-gpu";
+- };
+-
+- reg_dcdcd: dcdcd {
+- regulator-always-on;
+- regulator-min-microvolt = <960000>;
+- regulator-max-microvolt = <960000>;
+- regulator-name = "vdd-sys";
+- };
+-
+- reg_dcdce: dcdce {
+- regulator-always-on;
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
+- regulator-name = "vcc-dram";
+- };
+-
+- sw {
+- /* unused */
+- };
+- };
+- };
+-};
+-
+-&uart0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&uart0_ph_pins>;
+- status = "okay";
+ };
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+new file mode 100644
+index 0000000000000..0612c19cd9943
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+@@ -0,0 +1,150 @@
++// SPDX-License-Identifier: (GPL-2.0+ or MIT)
++/*
++ * Copyright (C) 2018 Amarula Solutions
++ * Author: Jagan Teki <jagan@amarulasolutions.com>
++ */
++
++/dts-v1/;
++
++#include "sun50i-h6.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "OrangePi One Plus";
++ compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
++
++ aliases {
++ serial0 = &uart0;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++};
++
++&mmc0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc0_pins>;
++ vmmc-supply = <®_cldo1>;
++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
++ bus-width = <4>;
++ status = "okay";
++};
++
++&r_i2c {
++ status = "okay";
++
++ axp805: pmic@36 {
++ compatible = "x-powers,axp805", "x-powers,axp806";
++ reg = <0x36>;
++ interrupt-parent = <&r_intc>;
++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ interrupt-controller;
++ #interrupt-cells = <1>;
++ x-powers,self-working-mode;
++
++ regulators {
++ reg_aldo1: aldo1 {
++ regulator-always-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-pl";
++ };
++
++ reg_aldo2: aldo2 {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-ac200";
++ };
++
++ reg_aldo3: aldo3 {
++ regulator-always-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc25-dram";
++ };
++
++ reg_bldo1: bldo1 {
++ regulator-always-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc-bias-pll";
++ };
++
++ reg_bldo2: bldo2 {
++ regulator-always-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc-efuse-pcie-hdmi-io";
++ };
++
++ reg_bldo3: bldo3 {
++ regulator-always-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc-dcxoio";
++ };
++
++ bldo4 {
++ /* unused */
++ };
++
++ reg_cldo1: cldo1 {
++ regulator-always-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-3v3";
++ };
++
++ reg_cldo2: cldo2 {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-wifi-1";
++ };
++
++ reg_cldo3: cldo3 {
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc-wifi-2";
++ };
++
++ reg_dcdca: dcdca {
++ regulator-always-on;
++ regulator-min-microvolt = <810000>;
++ regulator-max-microvolt = <1080000>;
++ regulator-name = "vdd-cpu";
++ };
++
++ reg_dcdcc: dcdcc {
++ regulator-min-microvolt = <810000>;
++ regulator-max-microvolt = <1080000>;
++ regulator-name = "vdd-gpu";
++ };
++
++ reg_dcdcd: dcdcd {
++ regulator-always-on;
++ regulator-min-microvolt = <960000>;
++ regulator-max-microvolt = <960000>;
++ regulator-name = "vdd-sys";
++ };
++
++ reg_dcdce: dcdce {
++ regulator-always-on;
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-name = "vcc-dram";
++ };
++
++ sw {
++ /* unused */
++ };
++ };
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_ph_pins>;
++ status = "okay";
++};
--- /dev/null
+From 919d2514641f2672496df144392dc24a62ca261e Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Tue, 20 Nov 2018 14:53:09 +0800
+Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Add board-wide 5V
+ regulator
+
+The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
+their USB 2.0 ports. VBUS is directly tied to the board wide 5V rail,
+which is also directly tied to the DC jack. There is no current limiting
+in this design. This 5V rail also supplies the various inputs to the
+PMIC.
+
+This patch adds a board wide 5V regulator and sets it as the input to
+the PMIC inputs.
+
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ .../boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+index 0612c19cd9943..f910d5eb92672 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+@@ -21,6 +21,15 @@
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
++
++ reg_vcc5v: vcc5v {
++ /* board wide 5V supply directly from the DC jack */
++ compatible = "regulator-fixed";
++ regulator-name = "vcc-5v";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-always-on;
++ };
+ };
+
+ &mmc0 {
+@@ -43,6 +52,14 @@
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ x-powers,self-working-mode;
++ vina-supply = <®_vcc5v>;
++ vinb-supply = <®_vcc5v>;
++ vinc-supply = <®_vcc5v>;
++ vind-supply = <®_vcc5v>;
++ vine-supply = <®_vcc5v>;
++ aldoin-supply = <®_vcc5v>;
++ bldoin-supply = <®_vcc5v>;
++ cldoin-supply = <®_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
--- /dev/null
+From 9b8d1ccd6dc546aaef37eabe1b29da5d6b2b8c02 Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Tue, 20 Nov 2018 14:53:10 +0800
+Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Enable USB 2.0 host and
+ OTG ports
+
+The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
+their USB 2.0 ports. VBUS is directly tied to the board wide 5V rail,
+which is also directly tied to the DC jack. There is no current limiting
+in this design.
+
+This patch enables all the USB 2.0 related device nodes, and sets the
+VBUS regulator supplies and OTG ID detection GPIO.
+
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ .../dts/allwinner/sun50i-h6-orangepi.dtsi | 28 +++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+index f910d5eb92672..f16b7ffbe797a 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+@@ -32,6 +32,14 @@
+ };
+ };
+
++&ehci0 {
++ status = "okay";
++};
++
++&ehci3 {
++ status = "okay";
++};
++
+ &mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+@@ -41,6 +49,14 @@
+ status = "okay";
+ };
+
++&ohci0 {
++ status = "okay";
++};
++
++&ohci3 {
++ status = "okay";
++};
++
+ &r_i2c {
+ status = "okay";
+
+@@ -165,3 +181,15 @@
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+ };
++
++&usb2otg {
++ dr_mode = "otg";
++ status = "okay";
++};
++
++&usb2phy {
++ usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
++ usb0_vbus-supply = <®_vcc5v>;
++ usb3_vbus-supply = <®_vcc5v>;
++ status = "okay";
++};
--- /dev/null
+From 1e33e0db826fb48bae9587b6f3a6ea29509bc6ca Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Tue, 20 Nov 2018 14:53:11 +0800
+Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Add device nodes for
+ LEDs
+
+The Orange Pi Lite 2 and Orange Pi One Plus both have two LEDs, one red
+and one green. These are driven directly by GPIO lines in an active high
+arrangement. The red LED is labeled "power", so it is set to be on by
+default.
+
+Note that the default drive current for the GPIO lines makes the LEDs
+very bright.
+
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ .../boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+index f16b7ffbe797a..b2526dac2fcfa 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+@@ -22,6 +22,21 @@
+ stdout-path = "serial0:115200n8";
+ };
+
++ leds {
++ compatible = "gpio-leds";
++
++ power {
++ label = "orangepi:red:power";
++ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
++ default-state = "on";
++ };
++
++ status {
++ label = "orangepi:green:status";
++ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
++ };
++ };
++
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC jack */
+ compatible = "regulator-fixed";
--- /dev/null
+From eabb3d424b6df102c6f6fd42323ef37f1f96f010 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.io>
+Date: Thu, 4 Oct 2018 20:28:49 +0800
+Subject: [PATCH] arm64: dts: allwinner: h6: add USB2-related device nodes
+
+Allwinner H6 has two USB2 ports, one OTG and one host-only.
+
+Add device tree nodes related to them.
+
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+Reviewed-by: Chen-Yu Tsai <wens@csie.org>
+Tested-by: Chen-Yu Tsai <wens@csie.org>
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 82 ++++++++++++++++++++
+ 1 file changed, 82 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index 45bbb51164467..e28a0fc4c8fa1 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -345,6 +345,88 @@
+ };
+ };
+
++ usb2otg: usb@5100000 {
++ compatible = "allwinner,sun50i-h6-musb",
++ "allwinner,sun8i-a33-musb";
++ reg = <0x05100000 0x0400>;
++ clocks = <&ccu CLK_BUS_OTG>;
++ resets = <&ccu RST_BUS_OTG>;
++ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "mc";
++ phys = <&usb2phy 0>;
++ phy-names = "usb";
++ extcon = <&usb2phy 0>;
++ status = "disabled";
++ };
++
++ usb2phy: phy@5100400 {
++ compatible = "allwinner,sun50i-h6-usb-phy";
++ reg = <0x05100400 0x24>,
++ <0x05101800 0x4>,
++ <0x05311800 0x4>;
++ reg-names = "phy_ctrl",
++ "pmu0",
++ "pmu3";
++ clocks = <&ccu CLK_USB_PHY0>,
++ <&ccu CLK_USB_PHY3>;
++ clock-names = "usb0_phy",
++ "usb3_phy";
++ resets = <&ccu RST_USB_PHY0>,
++ <&ccu RST_USB_PHY3>;
++ reset-names = "usb0_reset",
++ "usb3_reset";
++ status = "disabled";
++ #phy-cells = <1>;
++ };
++
++ ehci0: usb@5101000 {
++ compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
++ reg = <0x05101000 0x100>;
++ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_OHCI0>,
++ <&ccu CLK_BUS_EHCI0>,
++ <&ccu CLK_USB_OHCI0>;
++ resets = <&ccu RST_BUS_OHCI0>,
++ <&ccu RST_BUS_EHCI0>;
++ status = "disabled";
++ };
++
++ ohci0: usb@5101400 {
++ compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
++ reg = <0x05101400 0x100>;
++ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_OHCI0>,
++ <&ccu CLK_USB_OHCI0>;
++ resets = <&ccu RST_BUS_OHCI0>;
++ status = "disabled";
++ };
++
++ ehci3: usb@5311000 {
++ compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
++ reg = <0x05311000 0x100>;
++ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_OHCI3>,
++ <&ccu CLK_BUS_EHCI3>,
++ <&ccu CLK_USB_OHCI3>;
++ resets = <&ccu RST_BUS_OHCI3>,
++ <&ccu RST_BUS_EHCI3>;
++ phys = <&usb2phy 3>;
++ phy-names = "usb";
++ status = "disabled";
++ };
++
++ ohci3: usb@5311400 {
++ compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
++ reg = <0x05311400 0x100>;
++ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&ccu CLK_BUS_OHCI3>,
++ <&ccu CLK_USB_OHCI3>;
++ resets = <&ccu RST_BUS_OHCI3>;
++ phys = <&usb2phy 3>;
++ phy-names = "usb";
++ status = "disabled";
++ };
++
+ hdmi: hdmi@6000000 {
+ compatible = "allwinner,sun50i-h6-dw-hdmi";
+ reg = <0x06000000 0x10000>;
--- /dev/null
+From 29ce4e436f27562b366b9dc20ebf5a92f109f729 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <icenowy@aosc.io>
+Date: Thu, 15 Nov 2018 11:15:51 +0800
+Subject: [PATCH] arm64: dts: allwinner: h6: fix EMAC compatible string
+ sequence
+
+The SoC-specific compatible should come before the fallback compatible
+string when multiple compatible strings are present, but the sequence is
+wrong currently on H6 EMAC node (A64 fallback before H6 compatible).
+
+Fix the sequence.
+
+Fixes: c8ced5516d23 ("arm64: allwinner: h6: add EMAC device nodes")
+Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
+Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+index e28a0fc4c8fa1..d93a7add67e74 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+@@ -326,8 +326,8 @@
+ };
+
+ emac: ethernet@5020000 {
+- compatible = "allwinner,sun50i-a64-emac",
+- "allwinner,sun50i-h6-emac";
++ compatible = "allwinner,sun50i-h6-emac",
++ "allwinner,sun50i-a64-emac";
+ syscon = <&syscon>;
+ reg = <0x05020000 0x10000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
projects / openwrt / staging / wigyori.git / commitdiff