ARM: shmobile: r8a73a4: add thermal driver support
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tue, 26 Mar 2013 06:18:15 +0000 (23:18 -0700)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 2 Apr 2013 01:58:25 +0000 (10:58 +0900)
You can get current thermal by
> cat /sys/class/thermal/thermal_zone?/temp

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a73a4.dtsi
arch/arm/mach-shmobile/clock-r8a73a4.c
arch/arm/mach-shmobile/setup-r8a73a4.c

index 4c68ba15727cd33ff605b4f04869e4e14e4d2e81..7db5b504e64c7e7e915349e5fc1e697b349346c8 100644 (file)
                                <0 56 4>, <0 57 4>;
        };
 
+       thermal@e61f0000 {
+               compatible = "renesas,rcar-thermal";
+               reg = <0xe61f0000 0x14>, <0xe61f0100 0x38>,
+                        <0xe61f0200 0x38>, <0xe61f0300 0x38>;
+               interrupt-parent = <&gic>;
+               interrupts = <0 69 4>;
+       };
 };
index 037713bdff3f8c75cccdd88768f0cdb8a8842076..e710c00c3822168035a9a9182522392165f83f65 100644 (file)
@@ -29,6 +29,7 @@
 
 #define MPCKCR 0xe6150080
 #define SMSTPCR2 0xe6150138
+#define SMSTPCR5 0xe6150144
 
 static struct clk_mapping cpg_mapping = {
        .phys   = CPG_BASE,
@@ -56,7 +57,12 @@ static struct clk *main_clks[] = {
        &extal2_clk,
 };
 
-enum { MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP_NR };
+enum {
+       MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
+       MSTP522,
+       MSTP_NR
+};
+
 static struct clk mstp_clks[MSTP_NR] = {
        [MSTP204] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
        [MSTP203] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
@@ -64,6 +70,7 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP207] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
        [MSTP216] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
        [MSTP217] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 17, 0), /* SCIFB3 */
+       [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
 };
 
 static struct clk_lookup lookups[] = {
@@ -73,6 +80,10 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
        CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
+       CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+
+       /* for DT */
+       CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
 };
 
 void __init r8a73a4_clock_init(void)
index c2d86f30cde4d2d356a1a1a6a9a2d46cf299992c..c5a75a7a508fd6f47d2acedd9ace315e599b00f5 100644 (file)
@@ -155,6 +155,20 @@ static const struct resource irqc1_resources[] = {
                                          &irqc##idx##_data,            \
                                          sizeof(struct renesas_irqc_config))
 
+/* Thermal0 -> Thermal2 */
+static const struct resource thermal0_resources[] = {
+       DEFINE_RES_MEM(0xe61f0000, 0x14),
+       DEFINE_RES_MEM(0xe61f0100, 0x38),
+       DEFINE_RES_MEM(0xe61f0200, 0x38),
+       DEFINE_RES_MEM(0xe61f0300, 0x38),
+       DEFINE_RES_IRQ(gic_spi(69)),
+};
+
+#define r8a73a4_register_thermal()                                     \
+       platform_device_register_simple("rcar_thermal", -1,             \
+                                       thermal0_resources,             \
+                                       ARRAY_SIZE(thermal0_resources))
+
 void __init r8a73a4_add_standard_devices(void)
 {
        r8a73a4_register_scif(SCIFA0);
@@ -165,6 +179,7 @@ void __init r8a73a4_add_standard_devices(void)
        r8a73a4_register_scif(SCIFB3);
        r8a73a4_register_irqc(0);
        r8a73a4_register_irqc(1);
+       r8a73a4_register_thermal();
 }
 
 #ifdef CONFIG_USE_OF