drm/amd/display: Rename dc_surface to dc_plane_state

find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \
-o -name "*.cpp" -o -name "*.hpp" | \
xargs sed -i 's/struct dc_surface/struct dc_plane_state/g'

find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \
-o -name "*.cpp" -o -name "*.hpp" | \
xargs sed -i 's/struct dc_plane_state_update/struct dc_surface_update/g'

find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \
-o -name "*.cpp" -o -name "*.hpp" | \
xargs sed -i 's/struct dc_plane_state_status/struct dc_surface_status/g'

find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \
-o -name "*.cpp" -o -name "*.hpp" | \
xargs sed -i 's/struct dc_plane_state_dcc_cap/struct dc_surface_dcc_cap/g'

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7b597a0a2ab94a9f5d50a14aa94b81c21018762e..af6bed907d104f89ec659fd9dc871eb71da246a5 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1819,7 +1819,7 @@ static int dm_crtc_cursor_move(struct drm_crtc *crtc,
 
 static bool fill_rects_from_plane_state(
        const struct drm_plane_state *state,
-       struct dc_surface *surface)
+       struct dc_plane_state *surface)
 {
        surface->src_rect.x = state->src_x >> 16;
        surface->src_rect.y = state->src_y >> 16;
@@ -1894,7 +1894,7 @@ static int get_fb_info(
 
 static int fill_plane_attributes_from_fb(
        struct amdgpu_device *adev,
-       struct dc_surface *surface,
+       struct dc_plane_state *surface,
        const struct amdgpu_framebuffer *amdgpu_fb, bool addReq)
 {
        uint64_t tiling_flags;
@@ -2048,7 +2048,7 @@ static int fill_plane_attributes_from_fb(
 
 static void fill_gamma_from_crtc_state(
        const struct drm_crtc_state *crtc_state,
-       struct dc_surface *dc_surface)
+       struct dc_plane_state *dc_surface)
 {
        int i;
        struct dc_gamma *gamma;
@@ -2072,7 +2072,7 @@ static void fill_gamma_from_crtc_state(
 
 static int fill_plane_attributes(
                        struct amdgpu_device *adev,
-                       struct dc_surface *surface,
+                       struct dc_plane_state *surface,
                        struct drm_plane_state *plane_state,
                        struct drm_crtc_state *crtc_state,
                        bool addrReq)
@@ -3059,7 +3059,7 @@ static int dm_plane_helper_prepare_fb(
 
        if (dm_plane_state_new->surface &&
                        dm_plane_state_old->surface != dm_plane_state_new->surface) {
-               struct dc_surface *surface = dm_plane_state_new->surface;
+               struct dc_plane_state *surface = dm_plane_state_new->surface;
 
                if (surface->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {
                        surface->address.grph.addr.low_part = lower_32_bits(afb->address);
@@ -3160,7 +3160,7 @@ int dm_plane_atomic_check(struct drm_plane *plane,
        if (!dm_plane_state->surface)
                return true;
 
-       if (dc_validate_surface(dc, dm_plane_state->surface))
+       if (dc_validate_plane(dc, dm_plane_state->surface))
                return 0;
 
        return -EINVAL;
@@ -3926,7 +3926,7 @@ static void amdgpu_dm_commit_surfaces(struct drm_atomic_state *state,
        struct drm_plane *plane;
        struct drm_plane_state *old_plane_state;
        struct dc_stream *dc_stream_attach;
-       struct dc_surface *dc_surfaces_constructed[MAX_SURFACES];
+       struct dc_plane_state *dc_surfaces_constructed[MAX_SURFACES];
        struct amdgpu_crtc *acrtc_attach = to_amdgpu_crtc(pcrtc);
        struct dm_crtc_state *acrtc_state = to_dm_crtc_state(pcrtc->state);
        int planes_count = 0;
@@ -4377,7 +4377,7 @@ static uint32_t add_val_sets_surface(
        struct dc_validation_set *val_sets,
        uint32_t set_count,
        const struct dc_stream *stream,
-       struct dc_surface *surface)
+       struct dc_plane_state *surface)
 {
        uint32_t i = 0, j = 0;
 
@@ -4699,7 +4699,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
 
                        pflip_needed = !state->allow_modeset;
                        if (!pflip_needed) {
-                               struct dc_surface *surface;
+                               struct dc_plane_state *surface;
 
                                surface = dc_create_surface(dc);
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index ce0223af7d5f04f516a63c98a3764d86fb3b3151..dcf1f77390a8fc6ec4fbb41c65a20928414830cf 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -189,14 +189,14 @@ struct amdgpu_connector *amdgpu_dm_find_first_crct_matching_connector(
 struct amdgpu_framebuffer;
 struct amdgpu_display_manager;
 struct dc_validation_set;
-struct dc_surface;
+struct dc_plane_state;
 /* TODO rename to dc_stream_state */
 struct  dc_stream;
 
 
 struct dm_plane_state {
        struct drm_plane_state base;
-       struct dc_surface *surface;
+       struct dc_plane_state *surface;
 };
 
 struct dm_crtc_state {

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 5acf4c697ae809cdafb0b7ebbf5f91876bd42131..500788c35d70ecd40e1580a86f8954e351326ac5 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -645,7 +645,7 @@ static bool is_validation_required(
                        return true;
 
                for (j = 0; j < set[i].surface_count; j++) {
-                       struct dc_surface temp_surf;
+                       struct dc_plane_state temp_surf;
                        memset(&temp_surf, 0, sizeof(temp_surf));
 
                        temp_surf = *context->stream_status[i].surfaces[j];
@@ -684,7 +684,7 @@ static bool validate_surfaces(
 
        for (i = 0; i < set_count; i++)
                for (j = 0; j < set[i].surface_count; j++)
-                       if (!dc_validate_surface(dc, set[i].surfaces[j]))
+                       if (!dc_validate_plane(dc, set[i].surfaces[j]))
                                return false;
 
        return true;
@@ -978,7 +978,7 @@ static bool dc_commit_context_no_check(struct dc *dc, struct validate_context *c
                const struct dc_sink *sink = context->streams[i]->sink;
 
                for (j = 0; j < context->stream_status[i].surface_count; j++) {
-                       const struct dc_surface *surface =
+                       const struct dc_plane_state *surface =
                                        context->stream_status[i].surfaces[j];
 
                        core_dc->hwss.apply_ctx_for_surface(core_dc, surface, context);
@@ -1136,7 +1136,7 @@ bool dc_post_update_surfaces_to_stream(struct dc *dc)
 
 bool dc_commit_surfaces_to_stream(
                struct dc *dc,
-               struct dc_surface **new_surfaces,
+               struct dc_plane_state **new_surfaces,
                uint8_t new_surface_count,
                struct dc_stream *dc_stream)
 {
@@ -1220,7 +1220,7 @@ void dc_release_validate_context(struct validate_context *context)
 
 static bool is_surface_in_context(
                const struct validate_context *context,
-               const struct dc_surface *surface)
+               const struct dc_plane_state *surface)
 {
        int j;
 
@@ -1470,7 +1470,7 @@ void dc_update_surfaces_and_stream(struct dc *dc,
                update_surface_trace(dc, srf_updates, surface_count);
 
        if (update_type >= UPDATE_TYPE_FULL) {
-               struct dc_surface *new_surfaces[MAX_SURFACES] = {0};
+               struct dc_plane_state *new_surfaces[MAX_SURFACES] = {0};
 
                for (i = 0; i < surface_count; i++)
                        new_surfaces[i] = srf_updates[i].surface;
@@ -1496,7 +1496,7 @@ void dc_update_surfaces_and_stream(struct dc *dc,
 
        /* save update parameters into surface */
        for (i = 0; i < surface_count; i++) {
-               struct dc_surface *surface = srf_updates[i].surface;
+               struct dc_plane_state *surface = srf_updates[i].surface;
 
                if (srf_updates[i].flip_addr) {
                        surface->address = srf_updates[i].flip_addr->address;
@@ -1599,7 +1599,7 @@ void dc_update_surfaces_and_stream(struct dc *dc,
 
        /* Lock pipes for provided surfaces, or all active if full update*/
        for (i = 0; i < surface_count; i++) {
-               struct dc_surface *surface = srf_updates[i].surface;
+               struct dc_plane_state *surface = srf_updates[i].surface;
 
                for (j = 0; j < core_dc->res_pool->pipe_count; j++) {
                        struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
@@ -1649,7 +1649,7 @@ void dc_update_surfaces_and_stream(struct dc *dc,
 
        /* Perform requested Updates */
        for (i = 0; i < surface_count; i++) {
-               struct dc_surface *surface = srf_updates[i].surface;
+               struct dc_plane_state *surface = srf_updates[i].surface;
 
                if (update_type == UPDATE_TYPE_MED)
                        core_dc->hwss.apply_ctx_for_surface(

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
index bf127a88e53308ae97300cc78f9a561323c57a9e..e8d4b8c3ac2bd8930e2fcc736c6f11a654c2e1ac 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
@@ -38,7 +38,7 @@
 
 void pre_surface_trace(
                const struct dc *dc,
-               const struct dc_surface *const *surfaces,
+               const struct dc_plane_state *const *surfaces,
                int surface_count)
 {
        int i;
@@ -46,7 +46,7 @@ void pre_surface_trace(
        struct dal_logger *logger =  core_dc->ctx->logger;
 
        for (i = 0; i < surface_count; i++) {
-               const struct dc_surface *surface = surfaces[i];
+               const struct dc_plane_state *surface = surfaces[i];
 
                SURFACE_TRACE("Surface %d:\n", i);
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 005eac5fae80601c2643d5d05d219695fea1e801..fd1d6be79fee8ab6be96916d0fb32d6109748f00 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -430,7 +430,7 @@ static void rect_swap_helper(struct rect *rect)
 
 static void calculate_viewport(struct pipe_ctx *pipe_ctx)
 {
-       const struct dc_surface *surface = pipe_ctx->surface;
+       const struct dc_plane_state *surface = pipe_ctx->surface;
        const struct dc_stream *stream = pipe_ctx->stream;
        struct scaler_data *data = &pipe_ctx->scl_data;
        struct rect surf_src = surface->src_rect;
@@ -529,7 +529,7 @@ static void calculate_viewport(struct pipe_ctx *pipe_ctx)
 
 static void calculate_recout(struct pipe_ctx *pipe_ctx, struct view *recout_skip)
 {
-       const struct dc_surface *surface = pipe_ctx->surface;
+       const struct dc_plane_state *surface = pipe_ctx->surface;
        const struct dc_stream *stream = pipe_ctx->stream;
        struct rect surf_src = surface->src_rect;
        struct rect surf_clip = surface->clip_rect;
@@ -607,7 +607,7 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx, struct view *recout_skip
 
 static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
 {
-       const struct dc_surface *surface = pipe_ctx->surface;
+       const struct dc_plane_state *surface = pipe_ctx->surface;
        const struct dc_stream *stream = pipe_ctx->stream;
        struct rect surf_src = surface->src_rect;
        const int in_w = stream->src.width;
@@ -814,7 +814,7 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
 
 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
 {
-       const struct dc_surface *surface = pipe_ctx->surface;
+       const struct dc_plane_state *surface = pipe_ctx->surface;
        struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
        struct view recout_skip = { 0 };
        bool res = false;
@@ -1028,7 +1028,7 @@ static int acquire_first_split_pipe(
 #endif
 
 bool resource_attach_surfaces_to_context(
-               struct dc_surface * const *surfaces,
+               struct dc_plane_state * const *surfaces,
                int surface_count,
                struct dc_stream *stream,
                struct validate_context *context,
@@ -1075,7 +1075,7 @@ bool resource_attach_surfaces_to_context(
 
        tail_pipe = NULL;
        for (i = 0; i < surface_count; i++) {
-               struct dc_surface *surface = surfaces[i];
+               struct dc_plane_state *surface = surfaces[i];
                struct pipe_ctx *free_pipe = acquire_free_pipe_for_stream(
                                context, pool, stream);
 
@@ -1351,7 +1351,7 @@ bool resource_is_stream_unchanged(
 static void copy_pipe_ctx(
        const struct pipe_ctx *from_pipe_ctx, struct pipe_ctx *to_pipe_ctx)
 {
-       struct dc_surface *surface = to_pipe_ctx->surface;
+       struct dc_plane_state *surface = to_pipe_ctx->surface;
        struct dc_stream *stream = to_pipe_ctx->stream;
 
        *to_pipe_ctx = *from_pipe_ctx;
@@ -2055,7 +2055,7 @@ static void set_spd_info_packet(
 
 static void set_hdr_static_info_packet(
                struct encoder_info_packet *info_packet,
-               struct dc_surface *surface,
+               struct dc_plane_state *surface,
                struct dc_stream *stream)
 {
        uint16_t i = 0;
@@ -2534,13 +2534,13 @@ bool dc_validate_stream(const struct dc *dc, struct dc_stream *stream)
        return res == DC_OK;
 }
 
-bool dc_validate_surface(const struct dc *dc, const struct dc_surface *surface)
+bool dc_validate_plane(const struct dc *dc, const struct dc_plane_state *plane_state)
 {
        struct core_dc *core_dc = DC_TO_CORE(dc);
 
        /* TODO For now validates pixel format only */
-       if (core_dc->res_pool->funcs->validate_surface)
-               return core_dc->res_pool->funcs->validate_surface(surface) == DC_OK;
+       if (core_dc->res_pool->funcs->validate_plane)
+               return core_dc->res_pool->funcs->validate_plane(plane_state) == DC_OK;
 
        return true;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
index eded6b7da97d37db3cb31647af9a74e8fbdef1be..941b3671375d68cf19e06535c3d19eaffa7325c4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
@@ -34,7 +34,7 @@
 /*******************************************************************************
  * Private functions
  ******************************************************************************/
-static bool construct(struct dc_context *ctx, struct dc_surface *surface)
+static bool construct(struct dc_context *ctx, struct dc_plane_state *surface)
 {
        surface->ctx = ctx;
        memset(&surface->hdr_static_ctx,
@@ -42,7 +42,7 @@ static bool construct(struct dc_context *ctx, struct dc_surface *surface)
        return true;
 }
 
-static void destruct(struct dc_surface *surface)
+static void destruct(struct dc_plane_state *surface)
 {
        if (surface->gamma_correction != NULL) {
                dc_gamma_release(&surface->gamma_correction);
@@ -57,18 +57,18 @@ static void destruct(struct dc_surface *surface)
 /*******************************************************************************
  * Public functions
  ******************************************************************************/
-void enable_surface_flip_reporting(struct dc_surface *surface,
+void enable_surface_flip_reporting(struct dc_plane_state *surface,
                uint32_t controller_id)
 {
        surface->irq_source = controller_id + DC_IRQ_SOURCE_PFLIP1 - 1;
        /*register_flip_interrupt(surface);*/
 }
 
-struct dc_surface *dc_create_surface(const struct dc *dc)
+struct dc_plane_state *dc_create_surface(const struct dc *dc)
 {
        struct core_dc *core_dc = DC_TO_CORE(dc);
 
-       struct dc_surface *surface = dm_alloc(sizeof(*surface));
+       struct dc_plane_state *surface = dm_alloc(sizeof(*surface));
 
        if (NULL == surface)
                goto alloc_fail;
@@ -88,7 +88,7 @@ alloc_fail:
 }
 
 const struct dc_surface_status *dc_surface_get_status(
-               const struct dc_surface *dc_surface)
+               const struct dc_plane_state *dc_surface)
 {
        const struct dc_surface_status *surface_status;
        struct core_dc *core_dc;
@@ -120,13 +120,13 @@ const struct dc_surface_status *dc_surface_get_status(
        return surface_status;
 }
 
-void dc_surface_retain(struct dc_surface *surface)
+void dc_surface_retain(struct dc_plane_state *surface)
 {
        ASSERT(surface->ref_count > 0);
        ++surface->ref_count;
 }
 
-void dc_surface_release(struct dc_surface *surface)
+void dc_surface_release(struct dc_plane_state *surface)
 {
        ASSERT(surface->ref_count > 0);
        --surface->ref_count;

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index d03218d6210a0cdfeccca556ad65ebef6a5561cf..d1943b9644d466c95abee82797ba50e6fa97a650 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -92,7 +92,7 @@ struct dc_static_screen_events {
 
 /* Forward declaration*/
 struct dc;
-struct dc_surface;
+struct dc_plane_state;
 struct validate_context;
 
 struct dc_cap_funcs {
@@ -310,7 +310,7 @@ struct dc_surface_status {
        bool is_right_eye;
 };
 
-struct dc_surface {
+struct dc_plane_state {
        struct dc_plane_address address;
 
        struct scaling_taps scaling_quality;
@@ -367,7 +367,7 @@ struct dc_scaling_info {
 };
 
 struct dc_surface_update {
-       struct dc_surface *surface;
+       struct dc_plane_state *surface;
 
        /* isr safe update parameters.  null means no updates */
        struct dc_flip_addrs *flip_addr;
@@ -385,12 +385,12 @@ struct dc_surface_update {
 /*
  * Create a new surface with default parameters;
  */
-struct dc_surface *dc_create_surface(const struct dc *dc);
+struct dc_plane_state *dc_create_surface(const struct dc *dc);
 const struct dc_surface_status *dc_surface_get_status(
-               const struct dc_surface *dc_surface);
+               const struct dc_plane_state *dc_surface);
 
-void dc_surface_retain(struct dc_surface *dc_surface);
-void dc_surface_release(struct dc_surface *dc_surface);
+void dc_surface_retain(struct dc_plane_state *dc_surface);
+void dc_surface_release(struct dc_plane_state *dc_surface);
 
 void dc_gamma_retain(struct dc_gamma *dc_gamma);
 void dc_gamma_release(struct dc_gamma **dc_gamma);
@@ -424,7 +424,7 @@ struct dc_flip_addrs {
 
 bool dc_commit_surfaces_to_stream(
                struct dc *dc,
-               struct dc_surface **dc_surfaces,
+               struct dc_plane_state **dc_surfaces,
                uint8_t surface_count,
                struct dc_stream *stream);
 
@@ -470,7 +470,7 @@ enum surface_update_type {
 struct dc_stream_status {
        int primary_otg_inst;
        int surface_count;
-       struct dc_surface *surfaces[MAX_SURFACE_NUM];
+       struct dc_plane_state *surfaces[MAX_SURFACE_NUM];
 
        /*
         * link this stream passes through
@@ -582,13 +582,13 @@ bool dc_stream_get_scanoutpos(const struct dc_stream *stream,
  */
 struct dc_validation_set {
        struct dc_stream *stream;
-       struct dc_surface *surfaces[MAX_SURFACES];
+       struct dc_plane_state *surfaces[MAX_SURFACES];
        uint8_t surface_count;
 };
 
 bool dc_validate_stream(const struct dc *dc, struct dc_stream *stream);
 
-bool dc_validate_surface(const struct dc *dc, const struct dc_surface *surface);
+bool dc_validate_plane(const struct dc *dc, const struct dc_plane_state *plane_state);
 /*
  * This function takes a set of resources and checks that they are cofunctional.
  *

diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index 4c5e797da5b1254044fce31376a1373cbfefecc0..3c0b47373dfb9cfdba3945cc9d4660f58c7475d7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -528,7 +528,7 @@ enum dc_quantization_range {
 
 /* XFM */
 
-/* used in  struct dc_surface */
+/* used in  struct dc_plane_state */
 struct scaling_taps {
        uint32_t v_taps;
        uint32_t h_taps;

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index ee9e6bc88c320af8de902d1371d08a81dc63f4eb..4fb9584452a494a4f3314e0be63482e22710561c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -34,7 +34,7 @@
 #include "grph_object_defs.h"
 
 /* forward declarations */
-struct dc_surface;
+struct dc_plane_state;
 struct dc_stream;
 struct dc_link;
 struct dc_sink;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
index c46b3e82cdcc283dfa92406623d97b1a3a28cf81..af59ab93796a0bee5e8dd00acf3772a4941ada6f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
@@ -197,7 +197,7 @@ void dce_crtc_switch_to_clk_src(struct dce_hwseq *hws,
 }
 
 /* Only use LUT for 8 bit formats */
-bool dce_use_lut(const struct dc_surface *surface)
+bool dce_use_lut(const struct dc_plane_state *surface)
 {
        switch (surface->format) {
        case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888:

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
index ade7507e99c7f7dc3c74df1107a73631296705bd..d5cb98a92c5388d0bcc5f78ccd0d8f05f7bb84b1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
@@ -552,5 +552,5 @@ void dce_crtc_switch_to_clk_src(struct dce_hwseq *hws,
                struct clock_source *clk_src,
                unsigned int tg_inst);
 
-bool dce_use_lut(const struct dc_surface *surface);
+bool dce_use_lut(const struct dc_plane_state *surface);
 #endif   /*__DCE_HWSEQ_H__*/

diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
index 59f4caf057f79cea973b1276a8cf447aac483e18..2cf2fefc3d79724c6da8a8edecd42656c2e269c8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
@@ -804,10 +804,10 @@ static void dce100_destroy_resource_pool(struct resource_pool **pool)
        *pool = NULL;
 }
 
-enum dc_status dce100_validate_surface(const struct dc_surface *surface)
+enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state)
 {
 
-       if (surface->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
+       if (plane_state->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
                return DC_OK;
 
        return DC_FAIL_SURFACE_VALIDATE;
@@ -819,7 +819,7 @@ static const struct resource_funcs dce100_res_pool_funcs = {
        .validate_with_context = dce100_validate_with_context,
        .validate_guaranteed = dce100_validate_guaranteed,
        .validate_bandwidth = dce100_validate_bandwidth,
-       .validate_surface = dce100_validate_surface,
+       .validate_plane = dce100_validate_plane,
 };
 
 static bool construct(

diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
index 13fc637eb73198adb5a4cb6a40f742015bbf85a0..edc50caf04d10244fe787bd3bc3ea0e65cc02167 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
@@ -16,6 +16,6 @@ struct resource_pool *dce100_create_resource_pool(
        uint8_t num_virtual_links,
        struct core_dc *dc);
 
-enum dc_status dce100_validate_surface(const struct dc_surface *surface);
+enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state);
 
 #endif /* DCE100_RESOURCE_H_ */

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 1f18fcf52661733549a5c92a0c0f0788d54de3a3..84dc8916de96fd13200ec5f6317fc21729b118d6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -215,7 +215,7 @@ static bool dce110_enable_display_power_gating(
 }
 
 static void build_prescale_params(struct ipp_prescale_params *prescale_params,
-               const struct dc_surface *surface)
+               const struct dc_plane_state *surface)
 {
        prescale_params->mode = IPP_PRESCALE_MODE_FIXED_UNSIGNED;
 
@@ -240,7 +240,7 @@ static void build_prescale_params(struct ipp_prescale_params *prescale_params,
 
 static bool dce110_set_input_transfer_func(
        struct pipe_ctx *pipe_ctx,
-       const struct dc_surface *surface)
+       const struct dc_plane_state *surface)
 {
        struct input_pixel_processor *ipp = pipe_ctx->ipp;
        const struct dc_transfer_func *tf = NULL;
@@ -2038,7 +2038,7 @@ static void set_plane_config(
        struct resource_context *res_ctx)
 {
        struct mem_input *mi = pipe_ctx->mi;
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
        struct xfm_grph_csc_adjustment adjust;
        struct out_csc_color_matrix tbl_entry;
        unsigned int i;
@@ -2123,7 +2123,7 @@ static void set_plane_config(
 static void update_plane_addr(const struct core_dc *dc,
                struct pipe_ctx *pipe_ctx)
 {
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
 
        if (surface == NULL)
                return;
@@ -2138,7 +2138,7 @@ static void update_plane_addr(const struct core_dc *dc,
 
 void dce110_update_pending_status(struct pipe_ctx *pipe_ctx)
 {
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
 
        if (surface == NULL)
                return;
@@ -2490,7 +2490,7 @@ static void dce110_program_front_end_for_pipe(
 {
        struct mem_input *mi = pipe_ctx->mi;
        struct pipe_ctx *old_pipe = NULL;
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
        struct xfm_grph_csc_adjustment adjust;
        struct out_csc_color_matrix tbl_entry;
        unsigned int i;
@@ -2614,7 +2614,7 @@ static void dce110_program_front_end_for_pipe(
 
 static void dce110_apply_ctx_for_surface(
                struct core_dc *dc,
-               const struct dc_surface *surface,
+               const struct dc_plane_state *surface,
                struct validate_context *context)
 {
        int i;

diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
index 495f38750ae4719955bb1405ffe04003ecad0325..c68372fa129218d1f99df6bad782509d9abfec0a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
@@ -994,7 +994,7 @@ static const struct resource_funcs dce112_res_pool_funcs = {
        .validate_with_context = dce112_validate_with_context,
        .validate_guaranteed = dce112_validate_guaranteed,
        .validate_bandwidth = dce112_validate_bandwidth,
-       .validate_surface = dce100_validate_surface
+       .validate_plane = dce100_validate_plane
 };
 
 static void bw_calcs_data_update_from_pplib(struct core_dc *dc)

diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
index b31307b9d3e3b534893736f81609cacb3cb1a664..45f5fd63ce14d365d6e25cc8a392e80535c52c41 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
@@ -701,7 +701,7 @@ static const struct resource_funcs dce120_res_pool_funcs = {
        .validate_with_context = dce112_validate_with_context,
        .validate_guaranteed = dce112_validate_guaranteed,
        .validate_bandwidth = dce112_validate_bandwidth,
-       .validate_surface = dce100_validate_surface
+       .validate_plane = dce100_validate_plane
 };
 
 static void bw_calcs_data_update_from_pplib(struct core_dc *dc)

diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index 6eeb5e9f656f3dab95ab2a7af1c7743bc76b84a7..bcb66447b55857350f35c72258a084ab5c928006 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -825,7 +825,7 @@ static const struct resource_funcs dce80_res_pool_funcs = {
        .validate_with_context = dce80_validate_with_context,
        .validate_guaranteed = dce80_validate_guaranteed,
        .validate_bandwidth = dce80_validate_bandwidth,
-       .validate_surface = dce100_validate_surface
+       .validate_plane = dce100_validate_plane
 };
 
 static bool construct(

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index fa19c6b92f290dc1534c1ad96ae96df7d96e3529..3979cb03cf8d0207e5ae389e4530bb0d9b7c749f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1038,7 +1038,7 @@ static void reset_hw_ctx_wrap(
 static bool patch_address_for_sbs_tb_stereo(
                struct pipe_ctx *pipe_ctx, PHYSICAL_ADDRESS_LOC *addr)
 {
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
        bool sec_split = pipe_ctx->top_pipe &&
                        pipe_ctx->top_pipe->surface == pipe_ctx->surface;
        if (sec_split && surface->address.type == PLN_ADDR_TYPE_GRPH_STEREO &&
@@ -1065,7 +1065,7 @@ static void update_plane_addr(const struct core_dc *dc, struct pipe_ctx *pipe_ct
 {
        bool addr_patched = false;
        PHYSICAL_ADDRESS_LOC addr;
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
 
        if (surface == NULL)
                return;
@@ -1080,7 +1080,7 @@ static void update_plane_addr(const struct core_dc *dc, struct pipe_ctx *pipe_ct
 }
 
 static bool dcn10_set_input_transfer_func(
-       struct pipe_ctx *pipe_ctx, const struct dc_surface *surface)
+       struct pipe_ctx *pipe_ctx, const struct dc_plane_state *surface)
 {
        struct input_pixel_processor *ipp = pipe_ctx->ipp;
        const struct dc_transfer_func *tf = NULL;
@@ -1689,7 +1689,7 @@ static void dcn10_power_on_fe(
        struct pipe_ctx *pipe_ctx,
        struct validate_context *context)
 {
-       struct dc_surface *dc_surface = pipe_ctx->surface;
+       struct dc_plane_state *dc_surface = pipe_ctx->surface;
        struct dce_hwseq *hws = dc->hwseq;
 
        power_on_plane(dc->hwseq,
@@ -1898,7 +1898,7 @@ static void update_dchubp_dpp(
        struct dce_hwseq *hws = dc->hwseq;
        struct mem_input *mi = pipe_ctx->mi;
        struct input_pixel_processor *ipp = pipe_ctx->ipp;
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
        union plane_size size = surface->plane_size;
        struct default_adjustment ocsc = {0};
        struct mpcc_cfg mpcc_cfg = {0};
@@ -2068,7 +2068,7 @@ static void dcn10_pplib_apply_display_requirements(
 
 static void dcn10_apply_ctx_for_surface(
                struct core_dc *dc,
-               const struct dc_surface *surface,
+               const struct dc_plane_state *surface,
                struct validate_context *context)
 {
        int i, be_idx;
@@ -2468,7 +2468,7 @@ static bool dcn10_dummy_display_power_gating(
 
 void dcn10_update_pending_status(struct pipe_ctx *pipe_ctx)
 {
-       struct dc_surface *surface = pipe_ctx->surface;
+       struct dc_plane_state *surface = pipe_ctx->surface;
        struct timing_generator *tg = pipe_ctx->tg;
 
        if (surface->ctx->dc->debug.sanity_checks) {

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index da52971d3f06847ddff137e6b8ecf9dc32713e27..44a87c9427f7dc879f58ffdaa15b2c756be93e9d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -36,7 +36,7 @@
 
 #define MAX_CLOCK_SOURCES 7
 
-void enable_surface_flip_reporting(struct dc_surface *dc_surface,
+void enable_surface_flip_reporting(struct dc_plane_state *dc_surface,
                uint32_t controller_id);
 
 #include "grph_object_id.h"
@@ -104,7 +104,7 @@ struct resource_funcs {
                        const struct resource_pool *pool,
                        struct dc_stream *stream);
 
-       enum dc_status (*validate_surface)(const struct dc_surface *surface);
+       enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state);
 };
 
 struct audio_support{
@@ -154,7 +154,7 @@ struct resource_pool {
 };
 
 struct pipe_ctx {
-       struct dc_surface *surface;
+       struct dc_plane_state *surface;
        struct dc_stream *stream;
 
        struct mem_input *mi;

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index b2f7ba2115c90662024784ceb273a6cebb9a70f4..c529ddd2e0d563c685b2a2612cac49708c32972d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -59,7 +59,7 @@ struct hw_sequencer_funcs {
 
        void (*apply_ctx_for_surface)(
                        struct core_dc *dc,
-                       const struct dc_surface *surface,
+                       const struct dc_plane_state *surface,
                        struct validate_context *context);
 
        void (*set_plane_config)(
@@ -88,7 +88,7 @@ struct hw_sequencer_funcs {
 
        bool (*set_input_transfer_func)(
                                struct pipe_ctx *pipe_ctx,
-                               const struct dc_surface *surface);
+                               const struct dc_plane_state *surface);
 
        bool (*set_output_transfer_func)(
                                struct pipe_ctx *pipe_ctx,

diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index ca3f49379bea5a9c36ab6e23c16443f0f66f1309..bfd7cfc86df0b44a547dcc75540a8341cddba62f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -119,7 +119,7 @@ struct pipe_ctx *resource_get_head_pipe_for_stream(
                struct dc_stream *stream);
 
 bool resource_attach_surfaces_to_context(
-               struct dc_surface *const *surfaces,
+               struct dc_plane_state *const *surfaces,
                int surface_count,
                struct dc_stream *dc_stream,
                struct validate_context *context,

diff --git a/drivers/gpu/drm/amd/display/include/logger_interface.h b/drivers/gpu/drm/amd/display/include/logger_interface.h
index 0a872472ecbaad9b86c5efb51553f7fa496daea7..0e978d921fdf105b31c58894b7185889946c0a4d 100644 (file)
--- a/drivers/gpu/drm/amd/display/include/logger_interface.h
+++ b/drivers/gpu/drm/amd/display/include/logger_interface.h
@@ -77,7 +77,7 @@ void logger_write(struct dal_logger *logger,
 
 void pre_surface_trace(
                const struct dc *dc,
-               const struct dc_surface *const *surfaces,
+               const struct dc_plane_state *const *surfaces,
                int surface_count);
 
 void update_surface_trace(