ARM: dts: imx6: Fix PCI GPIO reset polarity
authorFabio Estevam <fabio.estevam@nxp.com>
Mon, 5 Jun 2017 16:22:20 +0000 (13:22 -0300)
committerShawn Guo <shawnguo@kernel.org>
Wed, 7 Jun 2017 03:36:44 +0000 (11:36 +0800)
The imx6 PCI driver ignores the GPIO polarity from 'reset-gpio' and
considers that the PCI reset is active low, unless the
property 'reset-gpio-active-high' is present.

Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'reset-gpio' property.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6q-ba16.dtsi
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
arch/arm/boot/dts/imx6q-novena.dts
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts

index 14fa6b25dc457f7a230f2d31bfc122e9093ef67f..5fcb0372d58b3ea61f395d7da978a317d729a2d1 100644 (file)
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
-       reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+       reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
        fsl,tx-swing-full = <103>;
        fsl,tx-swing-low = <103>;
        status = "okay";
index 0c5b2c38214ec2c7f6fd4bd98b7780c4e62d92ae..33eb7f180995dfccbd483d4e140e3b63902753a8 100644 (file)
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
-       reset-gpio = <&gpio4 8 0>;
+       reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index c21db67349c49a95e3a9200e20c12d008dd1c69c..d83cfb6ec598993831d5447fb89803107fe45edc 100644 (file)
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie_novena>;
-       reset-gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+       reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index 550e100e85fc3ecdca0957b045d19f94aff80ea4..9cd2a7477ed76b20bd938319c0fcef35a5117395 100644 (file)
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
-       reset-gpio = <&gpio6 2 GPIO_ACTIVE_HIGH>;
+       reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index ed6a89f724a5150295e5ba19db6c4056174ca9f1..1b18728732071f2dafd265be647c45a989eae693 100644 (file)
 };
 
 &pcie {
-       reset-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>;
+       reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index 6e5cb6a995509962203e575f23580783091c51d8..d81b0078a100feb882703bec5c395dc709305ba8 100644 (file)
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
-       reset-gpio = <&gpio4 17 0>;
+       reset-gpio = <&gpio4 17 GPIO_ACTIVE_LOW>;
        status = "disabled";
 };
 
index ac1989e5d5adde3c4bdad7b8a1c2a048f1c958ad..c5578d1c1ee4d126a2b2f156af02b0a4f29a1888 100644 (file)
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
-       reset-gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
+       reset-gpio = <&gpio4 10 GPIO_ACTIVE_LOW>;
        status = "okay";
 };