drm/amdgpu: initialize THM & CLK IP registers base address
authorHawking Zhang <Hawking.Zhang@amd.com>
Sat, 15 Jun 2019 15:14:30 +0000 (23:14 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Jun 2019 23:59:33 +0000 (18:59 -0500)
was missed before.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c

index 8cd4568c07eec4de07decdba28a54fcd07e48358..55014ce8670a20049195ab247788ce65a7155558 100644 (file)
@@ -58,6 +58,8 @@ legacy_init:
                adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
                adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
                adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));
+               adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i]));
+               adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i]));
        }
 
        return 0;