drm/vmwgfx: Add support for SVGA3dCmdDefineGBSurface_v3
authorDeepak Rawat <drawat@vmware.com>
Wed, 20 Jun 2018 21:20:23 +0000 (14:20 -0700)
committerThomas Hellstrom <thellstrom@vmware.com>
Fri, 6 Jul 2018 18:16:08 +0000 (20:16 +0200)
SVGA device added new command SVGA3dCmdDefineGBSurface_v3 which allows
64-bit SVGA3dSurfaceAllFlags. This commit adds support for
SVGA3dCmdDefineGBSurface_v3 command in vmwgfx.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c

index 7bb08bac728e3b169df3d62da045d15c6bf64fdd..06cce72b7b9e4564fe74ae02dc4a60a142b4ae96 100644 (file)
@@ -180,6 +180,8 @@ struct vmw_surface {
        SVGA3dTextureFilter autogen_filter;
        uint32_t multisample_count;
        struct list_head view_list;
+       SVGA3dMSPattern multisample_pattern;
+       SVGA3dMSQualityLevel quality_level;
 };
 
 struct vmw_marker_queue {
index 15f2cb2a151b065854803b1f30e01bce7ac158b1..6630abf3a95c31bb10d58b394a3604edddd22872 100644 (file)
@@ -1157,6 +1157,9 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
                        content_srf.flags             = 0;
                        content_srf.mip_levels[0]     = 1;
                        content_srf.multisample_count = 0;
+                       content_srf.multisample_pattern =
+                               SVGA3D_MS_PATTERN_NONE;
+                       content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
                } else {
                        content_srf = *new_vfbs->surface;
                }
index e90f8d39de535ccb65a59dd32facf6d82ef0713e..2abf9a895605cbbdc56fb28b7240114b672c3604 100644 (file)
@@ -785,6 +785,8 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
        srf->base_size = *srf->sizes;
        srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
        srf->multisample_count = 0;
+       srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
+       srf->quality_level = SVGA3D_MS_QUALITY_NONE;
 
        cur_bo_offset = 0;
        cur_offset = srf->offsets;
@@ -1031,6 +1033,10 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
                SVGA3dCmdHeader header;
                SVGA3dCmdDefineGBSurface_v2 body;
        } *cmd2;
+       struct {
+               SVGA3dCmdHeader header;
+               SVGA3dCmdDefineGBSurface_v3 body;
+       } *cmd3;
 
        if (likely(res->id != -1))
                return 0;
@@ -1047,7 +1053,11 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
                goto out_no_fifo;
        }
 
-       if (srf->array_size > 0) {
+       if (dev_priv->has_sm4_1 && srf->array_size > 0) {
+               cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
+               cmd_len = sizeof(cmd3->body);
+               submit_len = sizeof(*cmd3);
+       } else if (srf->array_size > 0) {
                /* has_dx checked on creation time. */
                cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
                cmd_len = sizeof(cmd2->body);
@@ -1060,6 +1070,7 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
 
        cmd = vmw_fifo_reserve(dev_priv, submit_len);
        cmd2 = (typeof(cmd2))cmd;
+       cmd3 = (typeof(cmd3))cmd;
        if (unlikely(!cmd)) {
                DRM_ERROR("Failed reserving FIFO space for surface "
                          "creation.\n");
@@ -1067,7 +1078,22 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
                goto out_no_fifo;
        }
 
-       if (srf->array_size > 0) {
+       if (dev_priv->has_sm4_1 && srf->array_size > 0) {
+               cmd3->header.id = cmd_id;
+               cmd3->header.size = cmd_len;
+               cmd3->body.sid = srf->res.id;
+               cmd3->body.surfaceFlags = (SVGA3dSurfaceAllFlags)srf->flags;
+               cmd3->body.format = srf->format;
+               cmd3->body.numMipLevels = srf->mip_levels[0];
+               cmd3->body.multisampleCount = srf->multisample_count;
+               cmd3->body.multisamplePattern = srf->multisample_pattern;
+               cmd3->body.qualityLevel = srf->quality_level;
+               cmd3->body.autogenFilter = srf->autogen_filter;
+               cmd3->body.size.width = srf->base_size.width;
+               cmd3->body.size.height = srf->base_size.height;
+               cmd3->body.size.depth = srf->base_size.depth;
+               cmd3->body.arraySize = srf->array_size;
+       } else if (srf->array_size > 0) {
                cmd2->header.id = cmd_id;
                cmd2->header.size = cmd_len;
                cmd2->body.sid = srf->res.id;
@@ -1561,6 +1587,8 @@ int vmw_surface_gb_priv_define(struct drm_device *dev,
        srf->autogen_filter    = SVGA3D_TEX_FILTER_NONE;
        srf->array_size        = array_size;
        srf->multisample_count = multisample_count;
+       srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
+       srf->quality_level = SVGA3D_MS_QUALITY_NONE;
 
        if (array_size)
                num_layers = array_size;