PCI: designware-ep: Make dw_pcie_ep_set_bar() handle 64-bit BARs properly

Since a 64-bit BAR consists of a BAR pair, we need to write to both
BARs in the BAR pair to setup the BAR properly.

Link: https://lkml.kernel.org/r/20180328115018.31921-7-niklas.cassel@axis.com
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
[lorenzo.pieralisi@arm.com: updated code according to review]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>

diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c
index b3a5533fe0b92b50fbc3b5555fe100f4cc424418..70c8c1eedb426563d8f73032f2227e8b60262258 100644 (file)
--- a/drivers/pci/dwc/pcie-designware-ep.c
+++ b/drivers/pci/dwc/pcie-designware-ep.c
@@ -138,8 +138,15 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no,
                return ret;
 
        dw_pcie_dbi_ro_wr_en(pci);
-       dw_pcie_writel_dbi2(pci, reg, size - 1);
+
+       dw_pcie_writel_dbi2(pci, reg, lower_32_bits(size - 1));
        dw_pcie_writel_dbi(pci, reg, flags);
+
+       if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+               dw_pcie_writel_dbi2(pci, reg + 4, upper_32_bits(size - 1));
+               dw_pcie_writel_dbi(pci, reg + 4, 0);
+       }
+
        dw_pcie_dbi_ro_wr_dis(pci);
 
        return 0;