drm/i915: Add state verification for the TypeC port mode
authorImre Deak <imre.deak@intel.com>
Fri, 28 Jun 2019 14:36:33 +0000 (17:36 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 1 Jul 2019 12:06:29 +0000 (15:06 +0300)
Add state verification for the TypeC port mode wrt. the port's AUX power
well enabling/disabling. Also check the correctness of changing the port
mode:
- When enabling/disabling the AUX power well for a TypeC port we must hold
  the TypeC port lock - the case for AUX transfers - or hold a Type C
  port link reference - the case for modeset enabling/disabling.
- When changing the TypeC port mode the port's AUX power domain must be
  disabled.

v2: (Ville)
- Simplify power_well_async_ref_count().
- Fix the commit log, clarifying what are the valid conditions to
  enable/disable the AUX power wells.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190628143635.22066-22-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c
drivers/gpu/drm/i915/display/intel_tc.c
drivers/gpu/drm/i915/display/intel_tc.h

index fd13cd68deae65dbb7f4f9d209659a2641f1527a..86a38116dc3abfd33ae0cfe32286f1dace1f7465 100644 (file)
@@ -17,6 +17,7 @@
 #include "intel_drv.h"
 #include "intel_hotplug.h"
 #include "intel_sideband.h"
+#include "intel_tc.h"
 
 bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
                                         enum i915_power_well_id power_well_id);
@@ -447,26 +448,106 @@ icl_combo_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
 #define ICL_TBT_AUX_PW_TO_CH(pw_idx)   \
        ((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C)
 
+static enum aux_ch icl_tc_phy_aux_ch(struct drm_i915_private *dev_priv,
+                                    struct i915_power_well *power_well)
+{
+       int pw_idx = power_well->desc->hsw.idx;
+
+       return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
+                                                ICL_AUX_PW_TO_CH(pw_idx);
+}
+
+#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
+
+static u64 async_put_domains_mask(struct i915_power_domains *power_domains);
+
+static int power_well_async_ref_count(struct drm_i915_private *dev_priv,
+                                     struct i915_power_well *power_well)
+{
+       int refs = hweight64(power_well->desc->domains &
+                            async_put_domains_mask(&dev_priv->power_domains));
+
+       WARN_ON(refs > power_well->count);
+
+       return refs;
+}
+
+static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
+                                       struct i915_power_well *power_well)
+{
+       enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
+       struct intel_digital_port *dig_port = NULL;
+       struct intel_encoder *encoder;
+
+       /* Bypass the check if all references are released asynchronously */
+       if (power_well_async_ref_count(dev_priv, power_well) ==
+           power_well->count)
+               return;
+
+       aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
+
+       for_each_intel_encoder(&dev_priv->drm, encoder) {
+               if (!intel_port_is_tc(dev_priv, encoder->port))
+                       continue;
+
+               /* We'll check the MST primary port */
+               if (encoder->type == INTEL_OUTPUT_DP_MST)
+                       continue;
+
+               dig_port = enc_to_dig_port(&encoder->base);
+               if (WARN_ON(!dig_port))
+                       continue;
+
+               if (dig_port->aux_ch != aux_ch) {
+                       dig_port = NULL;
+                       continue;
+               }
+
+               break;
+       }
+
+       if (WARN_ON(!dig_port))
+               return;
+
+       WARN_ON(!intel_tc_port_ref_held(dig_port));
+}
+
+#else
+
+static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv,
+                                       struct i915_power_well *power_well)
+{
+}
+
+#endif
+
 static void
 icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
                                 struct i915_power_well *power_well)
 {
-       int pw_idx = power_well->desc->hsw.idx;
-       bool is_tbt = power_well->desc->hsw.is_tc_tbt;
-       enum aux_ch aux_ch;
+       enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well);
        u32 val;
 
-       aux_ch = is_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
-                         ICL_AUX_PW_TO_CH(pw_idx);
+       icl_tc_port_assert_ref_held(dev_priv, power_well);
+
        val = I915_READ(DP_AUX_CH_CTL(aux_ch));
        val &= ~DP_AUX_CH_CTL_TBT_IO;
-       if (is_tbt)
+       if (power_well->desc->hsw.is_tc_tbt)
                val |= DP_AUX_CH_CTL_TBT_IO;
        I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
 
        hsw_power_well_enable(dev_priv, power_well);
 }
 
+static void
+icl_tc_phy_aux_power_well_disable(struct drm_i915_private *dev_priv,
+                                 struct i915_power_well *power_well)
+{
+       icl_tc_port_assert_ref_held(dev_priv, power_well);
+
+       hsw_power_well_disable(dev_priv, power_well);
+}
+
 /*
  * We should only use the power well if we explicitly asked the hardware to
  * enable it, so check if it's enabled and also check if we've requested it to
@@ -3119,7 +3200,7 @@ static const struct i915_power_well_ops icl_combo_phy_aux_power_well_ops = {
 static const struct i915_power_well_ops icl_tc_phy_aux_power_well_ops = {
        .sync_hw = hsw_power_well_sync_hw,
        .enable = icl_tc_phy_aux_power_well_enable,
-       .disable = hsw_power_well_disable,
+       .disable = icl_tc_phy_aux_power_well_disable,
        .is_enabled = hsw_power_well_enabled,
 };
 
index ba6492bc0ee09a878dc2fc1d6952133d680e73c6..467dd3ec541bd7cd973b287336700f09da69524e 100644 (file)
@@ -319,6 +319,8 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
        enum tc_port_mode old_tc_mode = dig_port->tc_mode;
 
        intel_display_power_flush_work(dev_priv);
+       WARN_ON(intel_display_power_is_enabled(dev_priv,
+                                              intel_aux_power_domain(dig_port)));
 
        icl_tc_phy_disconnect(dig_port);
        icl_tc_phy_connect(dig_port, required_lanes);
index 31af7be96070e4a4fb9879a6b45a7399c1550c24..8adc107cdbcb8482b18ee0e5cc4d4667bb216cfe 100644 (file)
@@ -7,8 +7,8 @@
 #define __INTEL_TC_H__
 
 #include <linux/types.h>
-
-struct intel_digital_port;
+#include <linux/mutex.h>
+#include "intel_drv.h"
 
 void icl_tc_phy_disconnect(struct intel_digital_port *dig_port);
 
@@ -23,6 +23,12 @@ void intel_tc_port_get_link(struct intel_digital_port *dig_port,
                            int required_lanes);
 void intel_tc_port_put_link(struct intel_digital_port *dig_port);
 
+static inline int intel_tc_port_ref_held(struct intel_digital_port *dig_port)
+{
+       return mutex_is_locked(&dig_port->tc_lock) ||
+              dig_port->tc_link_refcount;
+}
+
 void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy);
 
 #endif /* __INTEL_TC_H__ */