drm/amdgpu/gfx8: enable cp/rlc ints after we disable clockgating
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 14 Mar 2017 19:00:23 +0000 (15:00 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 21:39:55 +0000 (17:39 -0400)
Even if we disable clockgating, we still need to make sure the
cp/rlc interrupts are enabled for powergating which might still
be enabled.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index 818b07b40910f877b6384a30e761f57ac83822ea..7e69d4fae13659effb1ed96219f356ac325e7449 100644 (file)
@@ -6107,6 +6107,8 @@ static void gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
                          RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
                if (temp != data)
                        WREG32(mmRLC_CGCG_CGLS_CTRL, data);
+               /* enable interrupts again for PG */
+               gfx_v8_0_enable_gui_idle_interrupt(adev, true);
        }
 
        gfx_v8_0_wait_for_rlc_serdes(adev);