s390/mm: no local TLB flush for clearing-by-ASCE IDTE

The local-clearing control of the IDTE instruction does not have any effect
for the clearing-by-ASCE operation. Only the invalidation-and-clearing
operation respects the local-clearing bit.

Remove __tlb_flush_idte_local and simplify the batched TLB flushing code.

Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>

diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h
index 1a691ef740cfd3df0bb50bf744219b5059a43e46..490014c48b1356d604ab2c2ea849540ac170e297 100644 (file)
--- a/arch/s390/include/asm/tlbflush.h
+++ b/arch/s390/include/asm/tlbflush.h
@@ -26,17 +26,6 @@ static inline void __tlb_flush_idte(unsigned long asce)
                : : "a" (2048), "a" (asce) : "cc");
 }
 
-/*
- * Flush TLB entries for a specific ASCE on the local CPU
- */
-static inline void __tlb_flush_idte_local(unsigned long asce)
-{
-       /* Local TLB flush for the mm */
-       asm volatile(
-               "       .insn   rrf,0xb98e0000,0,%0,%1,1"
-               : : "a" (2048), "a" (asce) : "cc");
-}
-
 #ifdef CONFIG_SMP
 void smp_ptlb_all(void);
 
@@ -65,9 +54,7 @@ static inline void __tlb_flush_full(struct mm_struct *mm)
                /* Global TLB flush */
                __tlb_flush_global();
                /* Reset TLB flush mask */
-               if (MACHINE_HAS_TLB_LC)
-                       cpumask_copy(mm_cpumask(mm),
-                                    &mm->context.cpu_attach_mask);
+               cpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);
        }
        atomic_dec(&mm->context.flush_count);
        preempt_enable();
@@ -81,19 +68,12 @@ static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)
 {
        preempt_disable();
        atomic_inc(&mm->context.flush_count);
-       if (MACHINE_HAS_TLB_LC &&
-           cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {
-               __tlb_flush_idte_local(asce);
-       } else {
-               if (MACHINE_HAS_IDTE)
-                       __tlb_flush_idte(asce);
-               else
-                       __tlb_flush_global();
-               /* Reset TLB flush mask */
-               if (MACHINE_HAS_TLB_LC)
-                       cpumask_copy(mm_cpumask(mm),
-                                    &mm->context.cpu_attach_mask);
-       }
+       if (MACHINE_HAS_IDTE)
+               __tlb_flush_idte(asce);
+       else
+               __tlb_flush_global();
+       /* Reset TLB flush mask */
+       cpumask_copy(mm_cpumask(mm), &mm->context.cpu_attach_mask);
        atomic_dec(&mm->context.flush_count);
        preempt_enable();
 }
@@ -114,18 +94,12 @@ static inline void __tlb_flush_kernel(void)
  */
 static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce)
 {
-       if (MACHINE_HAS_TLB_LC)
-               __tlb_flush_idte_local(asce);
-       else
-               __tlb_flush_local();
+       __tlb_flush_local();
 }
 
 static inline void __tlb_flush_kernel(void)
 {
-       if (MACHINE_HAS_TLB_LC)
-               __tlb_flush_idte_local(init_mm.context.asce);
-       else
-               __tlb_flush_local();
+       __tlb_flush_local();
 }
 #endif