drm/amd/display: Keep blank until set visibility to true after mode switch

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 83b8b196cc1e4a703a477e3bf86fcb6ce259a1cc..ba8093317aa9e954e53e952aec31af067e5d1b7d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1609,12 +1609,10 @@ void dc_update_surfaces_and_stream(struct dc *dc,
                        if (!pipe_ctx->surface || pipe_ctx->top_pipe)
                                continue;
 
-                       if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) {
-                               core_dc->hwss.pipe_control_lock(
-                                               core_dc,
-                                               pipe_ctx,
-                                               true);
-                       }
+                       core_dc->hwss.pipe_control_lock(
+                                       core_dc,
+                                       pipe_ctx,
+                                       true);
                }
                if (update_type == UPDATE_TYPE_FULL)
                        break;
@@ -1697,12 +1695,11 @@ void dc_update_surfaces_and_stream(struct dc *dc,
                        if (!pipe_ctx->surface || pipe_ctx->top_pipe)
                                continue;
 
-                       if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) {
-                               core_dc->hwss.pipe_control_lock(
-                                               core_dc,
-                                               pipe_ctx,
-                                               false);
-                       }
+                       core_dc->hwss.pipe_control_lock(
+                                       core_dc,
+                                       pipe_ctx,
+                                       false);
+
                        break;
                }
        }

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
index a8c254f66c986dcd01bf911f5eeeaa5a47866501..c46b3e82cdcc283dfa92406623d97b1a3a28cf81 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
@@ -52,6 +52,10 @@ void dce_pipe_control_lock(struct core_dc *dc,
        uint32_t dcp_grph, scl, blnd, update_lock_mode, val;
        struct dce_hwseq *hws = dc->hwseq;
 
+       /* Not lock pipe when blank */
+       if (lock && pipe->tg->funcs->is_blanked(pipe->tg))
+               return;
+
        val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->pipe_idx],
                        BLND_DCP_GRPH_V_UPDATE_LOCK, &dcp_grph,
                        BLND_SCL_V_UPDATE_LOCK, &scl,