drm/i915: do not mix workaround with normal flow

Separate the two comments: one is a workaround and the other is a sanity
check. We could just compare != 1, but let's treat them differently due
to having different meaning.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190404230426.15837-4-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 402a58d3cd8184eb98a1b0477954e9f7f6c503d4..6fe04e12c8f228ae7dfec374bd8c7f60260b06af 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3753,14 +3753,16 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
                sagv_block_time_us = 10;
 
        /*
-        * SKL+ workaround: bspec recommends we disable SAGV when we have
-        * more then one pipe enabled
-        *
         * If there are no active CRTCs, no additional checks need be performed
         */
        if (hweight32(intel_state->active_crtcs) == 0)
                return true;
-       else if (hweight32(intel_state->active_crtcs) > 1)
+
+       /*
+        * SKL+ workaround: bspec recommends we disable SAGV when we have
+        * more then one pipe enabled
+        */
+       if (hweight32(intel_state->active_crtcs) > 1)
                return false;
 
        /* Since we're now guaranteed to only have one active CRTC... */