drm/i915: Don't pass crtc to intel_find_shared_dpll()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 7 Feb 2019 17:32:18 +0000 (19:32 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 19 Mar 2019 10:52:18 +0000 (12:52 +0200)
Passing both crtc and its state is redundant. Pass just the state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-1-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/i915/intel_dpll_mgr.c

index ca975213da2a2e03c9e2725f8f99e3ae01e555b3..b84a0b123dbf1623faa508fe70a0be0061c5a929 100644 (file)
@@ -241,11 +241,11 @@ out:
 }
 
 static struct intel_shared_dpll *
-intel_find_shared_dpll(struct intel_crtc *crtc,
-                      struct intel_crtc_state *crtc_state,
+intel_find_shared_dpll(struct intel_crtc_state *crtc_state,
                       enum intel_dpll_id range_min,
                       enum intel_dpll_id range_max)
 {
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        struct intel_shared_dpll *pll, *unused_pll = NULL;
        struct intel_shared_dpll_state *shared_dpll;
@@ -436,7 +436,7 @@ ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
                              crtc->base.base.id, crtc->base.name,
                              pll->info->name);
        } else {
-               pll = intel_find_shared_dpll(crtc, crtc_state,
+               pll = intel_find_shared_dpll(crtc_state,
                                             DPLL_ID_PCH_PLL_A,
                                             DPLL_ID_PCH_PLL_B);
        }
@@ -780,7 +780,7 @@ static struct intel_shared_dpll *hsw_ddi_hdmi_get_dpll(int clock,
 
        crtc_state->dpll_hw_state.wrpll = val;
 
-       pll = intel_find_shared_dpll(crtc, crtc_state,
+       pll = intel_find_shared_dpll(crtc_state,
                                     DPLL_ID_WRPLL1, DPLL_ID_WRPLL2);
 
        if (!pll)
@@ -840,7 +840,7 @@ hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
                crtc_state->dpll_hw_state.spll =
                        SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC;
 
-               pll = intel_find_shared_dpll(crtc, crtc_state,
+               pll = intel_find_shared_dpll(crtc_state,
                                             DPLL_ID_SPLL, DPLL_ID_SPLL);
        } else {
                return NULL;
@@ -1411,11 +1411,11 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
        }
 
        if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
-               pll = intel_find_shared_dpll(crtc, crtc_state,
+               pll = intel_find_shared_dpll(crtc_state,
                                             DPLL_ID_SKL_DPLL0,
                                             DPLL_ID_SKL_DPLL0);
        else
-               pll = intel_find_shared_dpll(crtc, crtc_state,
+               pll = intel_find_shared_dpll(crtc_state,
                                             DPLL_ID_SKL_DPLL1,
                                             DPLL_ID_SKL_DPLL3);
        if (!pll)
@@ -2390,7 +2390,7 @@ cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
                return NULL;
        }
 
-       pll = intel_find_shared_dpll(crtc, crtc_state,
+       pll = intel_find_shared_dpll(crtc_state,
                                     DPLL_ID_SKL_DPLL0,
                                     DPLL_ID_SKL_DPLL2);
        if (!pll) {
@@ -2940,7 +2940,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 
        crtc_state->dpll_hw_state = pll_state;
 
-       pll = intel_find_shared_dpll(crtc, crtc_state, min, max);
+       pll = intel_find_shared_dpll(crtc_state, min, max);
        if (!pll) {
                DRM_DEBUG_KMS("No PLL selected\n");
                return NULL;