select GPIOLIB
select HAVE_PCI
select NEED_MACH_IO_H
+ select SPARSE_IRQ
select USB_EHCI_BIG_ENDIAN_DESC
select USB_EHCI_BIG_ENDIAN_MMIO
help
#include <mach/hardware.h>
#include <asm/mach-types.h>
+#include "irqs.h"
+
#define AVILA_MAX_DEV 4
#define LOFT_MAX_DEV 6
#define IRQ_LINES 4
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
#define AVILA_SDA_PIN 7
#define AVILA_SCL_PIN 6
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
+#include "irqs.h"
+
#define IXP4XX_TIMER_FREQ 66666000
/*
#include <asm/irq.h>
#include <asm/mach/pci.h>
+#include "irqs.h"
+
#define SLOT0_DEVID 14
#define SLOT1_DEVID 15
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
#define COYOTE_IDE_BASE_PHYS IXP4XX_EXP_BUS_BASE(3)
#define COYOTE_IDE_BASE_VIRT 0xFFFE1000
#define COYOTE_IDE_REGION_SIZE 0x1000
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include "irqs.h"
+
#define MAX_DEV 4
#define IRQ_LINES 3
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
+#include "irqs.h"
+
#define DSMG600_SDA_PIN 5
#define DSMG600_SCL_PIN 4
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include "irqs.h"
+
#define MAX_DEV 3
#define IRQ_LINES 3
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
#define FSG_SDA_PIN 12
#define FSG_SCL_PIN 13
#include <asm/mach/pci.h>
+#include "irqs.h"
+
void __init gateway7001_pci_preinit(void)
{
irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
static struct flash_platform_data gateway7001_flash_data = {
.map_name = "cfi_probe",
.width = 2,
#include <mach/hardware.h>
#include <asm/mach/pci.h>
+#include "irqs.h"
+
#define SLOT0_DEVID 0
#define SLOT1_DEVID 1
#define INTA 10 /* slot 1 has INTA and INTB crossed */
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
/* GPIO 5,6,7 and 12 are hard wired to the Kendin KS8995M Switch
and operate as an SPI type interface. The details of the interface
are available on Kendin/Micrel's web site. */
+++ /dev/null
-/*
- * arch/arm/mach-ixp4xx/include/mach/irqs.h
- *
- * IRQ definitions for IXP4XX based systems
- *
- * Copyright (C) 2002 Intel Corporation.
- * Copyright (C) 2003 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef _ARCH_IXP4XX_IRQS_H_
-#define _ARCH_IXP4XX_IRQS_H_
-
-#define IRQ_IXP4XX_BASE 16
-
-#define IRQ_IXP4XX_NPEA (IRQ_IXP4XX_BASE + 0)
-#define IRQ_IXP4XX_NPEB (IRQ_IXP4XX_BASE + 1)
-#define IRQ_IXP4XX_NPEC (IRQ_IXP4XX_BASE + 2)
-#define IRQ_IXP4XX_QM1 (IRQ_IXP4XX_BASE + 3)
-#define IRQ_IXP4XX_QM2 (IRQ_IXP4XX_BASE + 4)
-#define IRQ_IXP4XX_TIMER1 (IRQ_IXP4XX_BASE + 5)
-#define IRQ_IXP4XX_GPIO0 (IRQ_IXP4XX_BASE + 6)
-#define IRQ_IXP4XX_GPIO1 (IRQ_IXP4XX_BASE + 7)
-#define IRQ_IXP4XX_PCI_INT (IRQ_IXP4XX_BASE + 8)
-#define IRQ_IXP4XX_PCI_DMA1 (IRQ_IXP4XX_BASE + 9)
-#define IRQ_IXP4XX_PCI_DMA2 (IRQ_IXP4XX_BASE + 10)
-#define IRQ_IXP4XX_TIMER2 (IRQ_IXP4XX_BASE + 11)
-#define IRQ_IXP4XX_USB (IRQ_IXP4XX_BASE + 12)
-#define IRQ_IXP4XX_UART2 (IRQ_IXP4XX_BASE + 13)
-#define IRQ_IXP4XX_TIMESTAMP (IRQ_IXP4XX_BASE + 14)
-#define IRQ_IXP4XX_UART1 (IRQ_IXP4XX_BASE + 15)
-#define IRQ_IXP4XX_WDOG (IRQ_IXP4XX_BASE + 16)
-#define IRQ_IXP4XX_AHB_PMU (IRQ_IXP4XX_BASE + 17)
-#define IRQ_IXP4XX_XSCALE_PMU (IRQ_IXP4XX_BASE + 18)
-#define IRQ_IXP4XX_GPIO2 (IRQ_IXP4XX_BASE + 19)
-#define IRQ_IXP4XX_GPIO3 (IRQ_IXP4XX_BASE + 20)
-#define IRQ_IXP4XX_GPIO4 (IRQ_IXP4XX_BASE + 21)
-#define IRQ_IXP4XX_GPIO5 (IRQ_IXP4XX_BASE + 22)
-#define IRQ_IXP4XX_GPIO6 (IRQ_IXP4XX_BASE + 23)
-#define IRQ_IXP4XX_GPIO7 (IRQ_IXP4XX_BASE + 24)
-#define IRQ_IXP4XX_GPIO8 (IRQ_IXP4XX_BASE + 25)
-#define IRQ_IXP4XX_GPIO9 (IRQ_IXP4XX_BASE + 26)
-#define IRQ_IXP4XX_GPIO10 (IRQ_IXP4XX_BASE + 27)
-#define IRQ_IXP4XX_GPIO11 (IRQ_IXP4XX_BASE + 28)
-#define IRQ_IXP4XX_GPIO12 (IRQ_IXP4XX_BASE + 29)
-#define IRQ_IXP4XX_SW_INT1 (IRQ_IXP4XX_BASE + 30)
-#define IRQ_IXP4XX_SW_INT2 (IRQ_IXP4XX_BASE + 31)
-#define IRQ_IXP4XX_USB_HOST (IRQ_IXP4XX_BASE + 32)
-#define IRQ_IXP4XX_I2C (IRQ_IXP4XX_BASE + 33)
-#define IRQ_IXP4XX_SSP (IRQ_IXP4XX_BASE + 34)
-#define IRQ_IXP4XX_TSYNC (IRQ_IXP4XX_BASE + 35)
-#define IRQ_IXP4XX_EAU_DONE (IRQ_IXP4XX_BASE + 36)
-#define IRQ_IXP4XX_SHA_DONE (IRQ_IXP4XX_BASE + 37)
-#define IRQ_IXP4XX_SWCP_PE (IRQ_IXP4XX_BASE + 58)
-#define IRQ_IXP4XX_QM_PE (IRQ_IXP4XX_BASE + 60)
-#define IRQ_IXP4XX_MCU_ECC (IRQ_IXP4XX_BASE + 61)
-#define IRQ_IXP4XX_EXP_PE (IRQ_IXP4XX_BASE + 62)
-
-#define _IXP4XX_GPIO_IRQ(n) (IRQ_IXP4XX_GPIO ## n)
-#define IXP4XX_GPIO_IRQ(n) _IXP4XX_GPIO_IRQ(n)
-
-#define NR_IRQS 512
-
-#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU)
-
-#endif
--- /dev/null
+/*
+ * arch/arm/mach-ixp4xx/include/mach/irqs.h
+ *
+ * IRQ definitions for IXP4XX based systems
+ *
+ * Copyright (C) 2002 Intel Corporation.
+ * Copyright (C) 2003 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _ARCH_IXP4XX_IRQS_H_
+#define _ARCH_IXP4XX_IRQS_H_
+
+#define IRQ_IXP4XX_BASE 16
+
+#define IRQ_IXP4XX_NPEA (IRQ_IXP4XX_BASE + 0)
+#define IRQ_IXP4XX_NPEB (IRQ_IXP4XX_BASE + 1)
+#define IRQ_IXP4XX_NPEC (IRQ_IXP4XX_BASE + 2)
+#define IRQ_IXP4XX_QM1 (IRQ_IXP4XX_BASE + 3)
+#define IRQ_IXP4XX_QM2 (IRQ_IXP4XX_BASE + 4)
+#define IRQ_IXP4XX_TIMER1 (IRQ_IXP4XX_BASE + 5)
+#define IRQ_IXP4XX_GPIO0 (IRQ_IXP4XX_BASE + 6)
+#define IRQ_IXP4XX_GPIO1 (IRQ_IXP4XX_BASE + 7)
+#define IRQ_IXP4XX_PCI_INT (IRQ_IXP4XX_BASE + 8)
+#define IRQ_IXP4XX_PCI_DMA1 (IRQ_IXP4XX_BASE + 9)
+#define IRQ_IXP4XX_PCI_DMA2 (IRQ_IXP4XX_BASE + 10)
+#define IRQ_IXP4XX_TIMER2 (IRQ_IXP4XX_BASE + 11)
+#define IRQ_IXP4XX_USB (IRQ_IXP4XX_BASE + 12)
+#define IRQ_IXP4XX_UART2 (IRQ_IXP4XX_BASE + 13)
+#define IRQ_IXP4XX_TIMESTAMP (IRQ_IXP4XX_BASE + 14)
+#define IRQ_IXP4XX_UART1 (IRQ_IXP4XX_BASE + 15)
+#define IRQ_IXP4XX_WDOG (IRQ_IXP4XX_BASE + 16)
+#define IRQ_IXP4XX_AHB_PMU (IRQ_IXP4XX_BASE + 17)
+#define IRQ_IXP4XX_XSCALE_PMU (IRQ_IXP4XX_BASE + 18)
+#define IRQ_IXP4XX_GPIO2 (IRQ_IXP4XX_BASE + 19)
+#define IRQ_IXP4XX_GPIO3 (IRQ_IXP4XX_BASE + 20)
+#define IRQ_IXP4XX_GPIO4 (IRQ_IXP4XX_BASE + 21)
+#define IRQ_IXP4XX_GPIO5 (IRQ_IXP4XX_BASE + 22)
+#define IRQ_IXP4XX_GPIO6 (IRQ_IXP4XX_BASE + 23)
+#define IRQ_IXP4XX_GPIO7 (IRQ_IXP4XX_BASE + 24)
+#define IRQ_IXP4XX_GPIO8 (IRQ_IXP4XX_BASE + 25)
+#define IRQ_IXP4XX_GPIO9 (IRQ_IXP4XX_BASE + 26)
+#define IRQ_IXP4XX_GPIO10 (IRQ_IXP4XX_BASE + 27)
+#define IRQ_IXP4XX_GPIO11 (IRQ_IXP4XX_BASE + 28)
+#define IRQ_IXP4XX_GPIO12 (IRQ_IXP4XX_BASE + 29)
+#define IRQ_IXP4XX_SW_INT1 (IRQ_IXP4XX_BASE + 30)
+#define IRQ_IXP4XX_SW_INT2 (IRQ_IXP4XX_BASE + 31)
+#define IRQ_IXP4XX_USB_HOST (IRQ_IXP4XX_BASE + 32)
+#define IRQ_IXP4XX_I2C (IRQ_IXP4XX_BASE + 33)
+#define IRQ_IXP4XX_SSP (IRQ_IXP4XX_BASE + 34)
+#define IRQ_IXP4XX_TSYNC (IRQ_IXP4XX_BASE + 35)
+#define IRQ_IXP4XX_EAU_DONE (IRQ_IXP4XX_BASE + 36)
+#define IRQ_IXP4XX_SHA_DONE (IRQ_IXP4XX_BASE + 37)
+#define IRQ_IXP4XX_SWCP_PE (IRQ_IXP4XX_BASE + 58)
+#define IRQ_IXP4XX_QM_PE (IRQ_IXP4XX_BASE + 60)
+#define IRQ_IXP4XX_MCU_ECC (IRQ_IXP4XX_BASE + 61)
+#define IRQ_IXP4XX_EXP_PE (IRQ_IXP4XX_BASE + 62)
+
+#define _IXP4XX_GPIO_IRQ(n) (IRQ_IXP4XX_GPIO ## n)
+#define IXP4XX_GPIO_IRQ(n) _IXP4XX_GPIO_IRQ(n)
+
+#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU)
+
+#endif
#include <mach/hardware.h>
#include <asm/mach-types.h>
+#include "irqs.h"
+
#define MAX_DEV 4
#define IRQ_LINES 4
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
#define IXDP425_SDA_PIN 7
#define IXDP425_SCL_PIN 6
#include <asm/mach/pci.h>
+#include "irqs.h"
+
void __init ixdpg425_pci_preinit(void)
{
irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
#include <linux/module.h>
#include <mach/qmgr.h>
+#include "irqs.h"
+
static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
static struct resource *mem_res;
static spinlock_t qmgr_lock;
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include "irqs.h"
+
#define MAX_DEV 3
#define IRQ_LINES 3
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
#define NAS100D_SDA_PIN 5
#define NAS100D_SCL_PIN 6
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
+#include "irqs.h"
+
#define MAX_DEV 3
#define IRQ_LINES 3
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
+#include "irqs.h"
+
#define NSLU2_SDA_PIN 7
#define NSLU2_SCL_PIN 6
#include <asm/mach/pci.h>
+#include "irqs.h"
+
void __init wg302v2_pci_preinit(void)
{
irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
+#include "irqs.h"
+
static struct flash_platform_data wg302v2_flash_data = {
.map_name = "cfi_probe",
.width = 2,