drm/i915/dp: move link_bw and rate_select debugging where used
authorJani Nikula <jani.nikula@intel.com>
Thu, 26 Apr 2018 08:25:25 +0000 (11:25 +0300)
committerJani Nikula <jani.nikula@intel.com>
Thu, 26 Apr 2018 15:21:02 +0000 (18:21 +0300)
We call intel_dp_compute_rate() in intel_dp_compute_config() only to be
able to debug log the link_bw and rate_select parameters; we don't use
the parameters here for anything else. We call intel_dp_compute_rate()
again during link training where we actually need and use the
parameters.

Move the debug logging of link_bw and rate_select to
intel_dp_link_training_clock_recovery(), and clean up the extra
intel_dp_compute_rate() call and extra clutter from the already
overcrowded intel_dp_compute_config().

v2: Rewrote commit message (Rodrigo, Manasi)

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c5cf6a179e2d244eceb6bb80a792765d9efbee4f.1524730974.git.jani.nikula@intel.com
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_dp_link_training.c

index 5f4b30faf6a24ecd641f2808c2b2f452f4f61f98..81cf363e71afcb62806feef091cd513d7d4ecd6e 100644 (file)
@@ -1706,7 +1706,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
        int bpp, mode_rate;
        int link_avail, link_clock;
        int common_len;
-       uint8_t link_bw, rate_select;
        bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
                                           DP_DPCD_QUIRK_LIMITED_M_N);
 
@@ -1852,12 +1851,8 @@ found:
        pipe_config->pipe_bpp = bpp;
        pipe_config->port_clock = intel_dp->common_rates[clock];
 
-       intel_dp_compute_rate(intel_dp, pipe_config->port_clock,
-                             &link_bw, &rate_select);
-
-       DRM_DEBUG_KMS("DP link bw %02x rate select %02x lane count %d clock %d bpp %d\n",
-                     link_bw, rate_select, pipe_config->lane_count,
-                     pipe_config->port_clock, bpp);
+       DRM_DEBUG_KMS("DP lane count %d clock %d bpp %d\n",
+                     pipe_config->lane_count, pipe_config->port_clock, bpp);
        DRM_DEBUG_KMS("DP link bw required %i available %i\n",
                      mode_rate, link_avail);
 
index f59b59bb0a211a897dd0623bb19f092ec4761bad..3fcaa98b90555b2fca7795c041f17090f18b0d30 100644 (file)
@@ -139,6 +139,11 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp)
        intel_dp_compute_rate(intel_dp, intel_dp->link_rate,
                              &link_bw, &rate_select);
 
+       if (link_bw)
+               DRM_DEBUG_KMS("Using LINK_BW_SET value %02x\n", link_bw);
+       else
+               DRM_DEBUG_KMS("Using LINK_RATE_SET value %02x\n", rate_select);
+
        /* Write the link configuration data */
        link_config[0] = link_bw;
        link_config[1] = intel_dp->lane_count;