KVM: arm/arm64: vgic: GICv2 IGROUPR should read as zero
authorChristoffer Dall <christoffer.dall@arm.com>
Mon, 16 Jul 2018 13:06:20 +0000 (15:06 +0200)
committerMarc Zyngier <marc.zyngier@arm.com>
Sat, 21 Jul 2018 15:02:22 +0000 (16:02 +0100)
We currently don't support grouping in the emulated VGIC, which is a
known defect on KVM (not hurting any currently used guests as far as
we're aware). This is currently handled by treating all interrupts as
group 0 interrupts for an emulated GICv2 and always signaling interrupts
as group 0 to the virtual CPU interface.

However, when reading which group interrupts belongs to in the guest
from the emulated VGIC, the VGIC currently reports group 1 instead of
group 0, which is misleading.  Fix this temporarily before introducing
full group support by changing the hander to _raz instead of _rao.

Fixes: fb848db39661a "KVM: arm/arm64: vgic-new: Add GICv2 MMIO handling framework"
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
virt/kvm/arm/vgic/vgic-init.c
virt/kvm/arm/vgic/vgic-mmio-v2.c

index 8b6fc45c42feae8f8eb212705b20350e0bcae7d3..230c9221fe7092d9f20eacf9d1ed22db25bda512 100644 (file)
@@ -298,7 +298,7 @@ int vgic_init(struct kvm *kvm)
 
        vgic_debug_init(kvm);
 
-       dist->implementation_rev = 0;
+       dist->implementation_rev = 1;
        dist->initialized = true;
 
 out:
index f0c5351805b667bca541f81d5a5911e5ef5fccb8..db646f140e7dfbe8be14eb0a8207222ff7b1fd0a 100644 (file)
 #include "vgic.h"
 #include "vgic-mmio.h"
 
+/*
+ * The Revision field in the IIDR have the following meanings:
+ *
+ * Revision 1: Report GICv2 interrupts as group 0 instead of group 1
+ */
+
 static unsigned long vgic_mmio_read_v2_misc(struct kvm_vcpu *vcpu,
                                            gpa_t addr, unsigned int len)
 {
@@ -365,7 +371,7 @@ static const struct vgic_register_region vgic_v2_dist_registers[] = {
                vgic_mmio_read_v2_misc, vgic_mmio_write_v2_misc, 12,
                VGIC_ACCESS_32bit),
        REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_IGROUP,
-               vgic_mmio_read_rao, vgic_mmio_write_wi, NULL, NULL, 1,
+               vgic_mmio_read_raz, vgic_mmio_write_wi, NULL, NULL, 1,
                VGIC_ACCESS_32bit),
        REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_SET,
                vgic_mmio_read_enable, vgic_mmio_write_senable, NULL, NULL, 1,