ASoC: rt5645: fix PLL source register definitions

Fix PLL source register definitions.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/rt5645.h b/sound/soc/codecs/rt5645.h
index fa5c56037d587a5a540d124c756bffd8d5791dd9..18978894eb63c2f1e758592fa59b212a10224f7c 100644 (file)
--- a/sound/soc/codecs/rt5645.h
+++ b/sound/soc/codecs/rt5645.h
@@ -1063,13 +1063,14 @@
 #define RT5645_SCLK_SRC_SFT                    14
 #define RT5645_SCLK_SRC_MCLK                   (0x0 << 14)
 #define RT5645_SCLK_SRC_PLL1                   (0x1 << 14)
-#define RT5645_SCLK_SRC_RCCLK                  (0x2 << 14) /* 15MHz */
-#define RT5645_PLL1_SRC_MASK                   (0x3 << 12)
-#define RT5645_PLL1_SRC_SFT                    12
-#define RT5645_PLL1_SRC_MCLK                   (0x0 << 12)
-#define RT5645_PLL1_SRC_BCLK1                  (0x1 << 12)
-#define RT5645_PLL1_SRC_BCLK2                  (0x2 << 12)
-#define RT5645_PLL1_SRC_BCLK3                  (0x3 << 12)
+#define RT5645_SCLK_SRC_RCCLK                  (0x2 << 14)
+#define RT5645_PLL1_SRC_MASK                   (0x7 << 11)
+#define RT5645_PLL1_SRC_SFT                    11
+#define RT5645_PLL1_SRC_MCLK                   (0x0 << 11)
+#define RT5645_PLL1_SRC_BCLK1                  (0x1 << 11)
+#define RT5645_PLL1_SRC_BCLK2                  (0x2 << 11)
+#define RT5645_PLL1_SRC_BCLK3                  (0x3 << 11)
+#define RT5645_PLL1_SRC_RCCLK                  (0x4 << 11)
 #define RT5645_PLL1_PD_MASK                    (0x1 << 3)
 #define RT5645_PLL1_PD_SFT                     3
 #define RT5645_PLL1_PD_1                       (0x0 << 3)