#clock-cells = <1>;
};
- cmu_peris: clock-controller@0x10040000 {
+ cmu_peris: clock-controller@10040000 {
compatible = "samsung,exynos5433-cmu-peris";
reg = <0x10040000 0x1000>;
#clock-cells = <1>;
iommu-names = "left", "right";
};
- sysmmu_decon0x: sysmmu@0x13a00000 {
+ sysmmu_decon0x: sysmmu@13a00000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13a00000 0x1000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_decon1x: sysmmu@0x13a10000 {
+ sysmmu_decon1x: sysmmu@13a10000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13a10000 0x1000>;
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_gscl0: sysmmu@0x13C80000 {
+ sysmmu_gscl0: sysmmu@13c80000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13C80000 0x1000>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_gscl1: sysmmu@0x13C90000 {
+ sysmmu_gscl1: sysmmu@13c90000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13C90000 0x1000>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_gscl2: sysmmu@0x13CA0000 {
+ sysmmu_gscl2: sysmmu@13ca0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13CA0000 0x1000>;
interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_jpeg: sysmmu@0x15060000 {
+ sysmmu_jpeg: sysmmu@15060000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15060000 0x1000>;
interrupts = <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_mfc_0: sysmmu@0x15200000 {
+ sysmmu_mfc_0: sysmmu@15200000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15200000 0x1000>;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <0>;
};
- sysmmu_mfc_1: sysmmu@0x15210000 {
+ sysmmu_mfc_1: sysmmu@15210000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15210000 0x1000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;