drm/i915: Preparations for enabling P010, P012, P016 formats

Preparations for enabling P010, P012 and P016 formats. These
formats will extend NV12 for larger bit depths.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1551700595-21481-3-git-send-email-swati2.sharma@intel.com

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index db09659044397b17fe61731e0a37b7d0fc6e470b..dd6c096992373af6724e07d9a98725464dacc6d0 100644 (file)
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -135,7 +135,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
                new_crtc_state->active_planes |= BIT(plane->id);
 
        if (new_plane_state->base.visible &&
-           new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
+           is_planar_yuv_format(new_plane_state->base.fb->format->format))
                new_crtc_state->nv12_planes |= BIT(plane->id);
 
        if (new_plane_state->base.visible || old_plane_state->base.visible)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ccb616351bba725052ea3a752cc5263744d58af2..0345d04a63f48fe77974867bc9e1b19c82b85da9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2677,6 +2677,12 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
                return DRM_FORMAT_RGB565;
        case PLANE_CTL_FORMAT_NV12:
                return DRM_FORMAT_NV12;
+       case PLANE_CTL_FORMAT_P010:
+               return DRM_FORMAT_P010;
+       case PLANE_CTL_FORMAT_P012:
+               return DRM_FORMAT_P012;
+       case PLANE_CTL_FORMAT_P016:
+               return DRM_FORMAT_P016;
        default:
        case PLANE_CTL_FORMAT_XRGB_8888:
                if (rgb_order) {
@@ -3176,7 +3182,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
         * Handle the AUX surface first since
         * the main surface setup depends on it.
         */
-       if (fb->format->format == DRM_FORMAT_NV12) {
+       if (is_planar_yuv_format(fb->format->format)) {
                ret = skl_check_nv12_aux_surface(plane_state);
                if (ret)
                        return ret;
@@ -3600,6 +3606,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
                return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
        case DRM_FORMAT_NV12:
                return PLANE_CTL_FORMAT_NV12;
+       case DRM_FORMAT_P010:
+               return PLANE_CTL_FORMAT_P010;
+       case DRM_FORMAT_P012:
+               return PLANE_CTL_FORMAT_P012;
+       case DRM_FORMAT_P016:
+               return PLANE_CTL_FORMAT_P016;
        default:
                MISSING_CASE(pixel_format);
        }
@@ -5036,9 +5048,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
                return 0;
        }
 
-       if (format && format->format == DRM_FORMAT_NV12 &&
+       if (format && is_planar_yuv_format(format->format) &&
            (src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {
-               DRM_DEBUG_KMS("NV12: src dimensions not met\n");
+               DRM_DEBUG_KMS("Planar YUV: src dimensions not met\n");
                return -EINVAL;
        }
 
@@ -5112,7 +5124,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
 
        /* Pre-gen11 and SDR planes always need a scaler for planar formats. */
        if (!icl_is_hdr_plane(intel_plane) &&
-           fb && fb->format->format == DRM_FORMAT_NV12)
+           fb && is_planar_yuv_format(fb->format->format))
                need_scaler = true;
 
        ret = skl_update_scaler(crtc_state, force_detach,
@@ -5149,6 +5161,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
        case DRM_FORMAT_UYVY:
        case DRM_FORMAT_VYUY:
        case DRM_FORMAT_NV12:
+       case DRM_FORMAT_P010:
+       case DRM_FORMAT_P012:
+       case DRM_FORMAT_P016:
                break;
        default:
                DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -11134,7 +11149,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
                }
 
                if (!linked_state) {
-                       DRM_DEBUG_KMS("Need %d free Y planes for NV12\n",
+                       DRM_DEBUG_KMS("Need %d free Y planes for planar YUV\n",
                                      hweight8(crtc_state->nv12_planes));
 
                        return -EINVAL;
@@ -13767,7 +13782,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state,
         *            or
         *    cdclk/crtc_clock
         */
-       mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3;
+       mult = is_planar_yuv_format(pixel_format) ? 2 : 3;
        tmpclk1 = (1 << 16) * mult - 1;
        tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
        max_scale = min(tmpclk1, tmpclk2);

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 15db41394b9ed75d9de8545c8a0faff9efbc9a9b..f3e2f694de596ffa3afa55bf6a4ae5d32bd9982e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -2300,6 +2300,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
 
 
 /* intel_sprite.c */
+bool is_planar_yuv_format(u32 pixelformat);
 int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
                             int usecs);
 struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 54307f1df6cf26bb855a7291c7f1aec0b5cdc475..14ac31888c67d42316fc1eaa367b06260c6759f7 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3970,7 +3970,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv,
                val = I915_READ(PLANE_BUF_CFG(pipe, plane_id));
                val2 = I915_READ(PLANE_NV12_BUF_CFG(pipe, plane_id));
 
-               if (fourcc == DRM_FORMAT_NV12)
+               if (is_planar_yuv_format(fourcc))
                        swap(val, val2);
 
                skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
@@ -4180,7 +4180,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
 
        if (intel_plane->id == PLANE_CURSOR)
                return 0;
-       if (plane == 1 && format != DRM_FORMAT_NV12)
+       if (plane == 1 && !is_planar_yuv_format(format))
                return 0;
 
        /*
@@ -4192,7 +4192,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
        height = drm_rect_height(&intel_pstate->base.src) >> 16;
 
        /* UV plane does 1/2 pixel sub-sampling */
-       if (plane == 1 && format == DRM_FORMAT_NV12) {
+       if (plane == 1 && is_planar_yuv_format(format)) {
                width /= 2;
                height /= 2;
        }
@@ -4578,9 +4578,9 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
        const struct drm_framebuffer *fb = pstate->fb;
        u32 interm_pbpl;
 
-       /* only NV12 format has two planes */
-       if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
-               DRM_DEBUG_KMS("Non NV12 format have single plane\n");
+       /* only planar format has two planes */
+       if (color_plane == 1 && !is_planar_yuv_format(fb->format->format)) {
+               DRM_DEBUG_KMS("Non planar format have single plane\n");
                return -EINVAL;
        }
 
@@ -4591,7 +4591,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
        wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
        wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
                         fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
-       wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
+       wp->is_planar = is_planar_yuv_format(fb->format->format);
 
        if (plane->id == PLANE_CURSOR) {
                wp->width = intel_pstate->base.crtc_w;

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b56a1a9ad01d2e724715503b545d4396f56f7194..d4e436a278a799e8476a7d412270f910c7812d67 100644 (file)
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -41,6 +41,19 @@
 #include "i915_drv.h"
 #include <drm/drm_color_mgmt.h>
 
+bool is_planar_yuv_format(u32 pixelformat)
+{
+       switch (pixelformat) {
+       case DRM_FORMAT_NV12:
+       case DRM_FORMAT_P010:
+       case DRM_FORMAT_P012:
+       case DRM_FORMAT_P016:
+               return true;
+       default:
+               return false;
+       }
+}
+
 int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
                             int usecs)
 {
@@ -335,7 +348,7 @@ skl_program_scaler(struct intel_plane *plane,
                                      0, INT_MAX);
 
        /* TODO: handle sub-pixel coordinates */
-       if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
+       if (is_planar_yuv_format(plane_state->base.fb->format->format) &&
            !icl_is_hdr_plane(plane)) {
                y_hphase = skl_scaler_calc_phase(1, hscale, false);
                y_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -1551,10 +1564,10 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
        int src_w = drm_rect_width(&plane_state->base.src) >> 16;
 
        /* Display WA #1106 */
-       if (fb->format->format == DRM_FORMAT_NV12 && src_w & 3 &&
+       if (is_planar_yuv_format(fb->format->format) && src_w & 3 &&
            (rotation == DRM_MODE_ROTATE_270 ||
             rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
-               DRM_DEBUG_KMS("src width must be multiple of 4 for rotated NV12\n");
+               DRM_DEBUG_KMS("src width must be multiple of 4 for rotated planar YUV\n");
                return -EINVAL;
        }
 
@@ -1945,6 +1958,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
        case DRM_FORMAT_UYVY:
        case DRM_FORMAT_VYUY:
        case DRM_FORMAT_NV12:
+       case DRM_FORMAT_P010:
+       case DRM_FORMAT_P012:
+       case DRM_FORMAT_P016:
                if (modifier == I915_FORMAT_MOD_Yf_TILED)
                        return true;
                /* fall through */