RDMA/bnxt_re: Skip backing store allocation for 57500 series
authorDevesh Sharma <devesh.sharma@broadcom.com>
Thu, 7 Feb 2019 06:31:24 +0000 (01:31 -0500)
committerJason Gunthorpe <jgg@mellanox.com>
Thu, 7 Feb 2019 20:24:48 +0000 (13:24 -0700)
The backing store to keep HW context data structures is allocated and
initialized by L2 driver. For 57500 chip RoCE driver do not require to
allocate and initialize additional memory. Changing to skip duplicate
allocation and initialization for 57500 adapters. Driver continues as
before for older chips.

This patch also takes care of stats context memory alignment to 128
boundary, a requirement for 57500 series of chip. Older chips do not care
of alignment, thus the change is unconditional.

Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/bnxt_re/main.c
drivers/infiniband/hw/bnxt_re/qplib_rcfw.c
drivers/infiniband/hw/bnxt_re/qplib_res.c
drivers/infiniband/hw/bnxt_re/qplib_res.h

index 0df180850a75c58740429e6289385eed9bcf3dcb..0d40a930c1922d486a027564caf20dca7ef1e194 100644 (file)
@@ -1401,7 +1401,8 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
        if (!rdev->is_virtfn)
                bnxt_re_set_resource_limits(rdev);
 
-       rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0);
+       rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0,
+                                 bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx));
        if (rc) {
                pr_err("Failed to allocate QPLIB context: %#x\n", rc);
                goto disable_rcfw;
index 9c000245a6de96672d2a87040997c17931376f00..c6461e957078829e0c96cff7edb9ae3edd593c39 100644 (file)
@@ -482,11 +482,13 @@ int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw,
        req.log2_dbr_pg_size = cpu_to_le16(PAGE_SHIFT -
                                           RCFW_DBR_BASE_PAGE_SHIFT);
        /*
-        * VFs need not setup the HW context area, PF
+        * Gen P5 devices doesn't require this allocation
+        * as the L2 driver does the same for RoCE also.
+        * Also, VFs need not setup the HW context area, PF
         * shall setup this area for VF. Skipping the
         * HW programming
         */
-       if (is_virtfn)
+       if (is_virtfn || bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx))
                goto skip_ctx_setup;
 
        level = ctx->qpc_tbl.level;
index 57d4951679cb9da74fec015e431a381df7092915..c8502c2844a273a2ef1b5c44902c1561431779a4 100644 (file)
@@ -330,13 +330,13 @@ void bnxt_qplib_free_ctx(struct pci_dev *pdev,
  */
 int bnxt_qplib_alloc_ctx(struct pci_dev *pdev,
                         struct bnxt_qplib_ctx *ctx,
-                        bool virt_fn)
+                        bool virt_fn, bool is_p5)
 {
        int i, j, k, rc = 0;
        int fnz_idx = -1;
        __le64 **pbl_ptr;
 
-       if (virt_fn)
+       if (virt_fn || is_p5)
                goto stats_alloc;
 
        /* QPC Tables */
@@ -762,7 +762,11 @@ static int bnxt_qplib_alloc_stats_ctx(struct pci_dev *pdev,
 {
        memset(stats, 0, sizeof(*stats));
        stats->fw_id = -1;
-       stats->size = sizeof(struct ctx_hw_stats);
+       /* 128 byte aligned context memory is required only for 57500.
+        * However making this unconditional, it does not harm previous
+        * generation.
+        */
+       stats->size = ALIGN(sizeof(struct ctx_hw_stats), 128);
        stats->dma = dma_alloc_coherent(&pdev->dev, stats->size,
                                        &stats->dma_map, GFP_KERNEL);
        if (!stats->dma) {
index 35d862b449080a80643bf935bc128d694365bbe2..32cebd0f1436a6a41a224194c0aa03f3747e0398 100644 (file)
@@ -252,5 +252,5 @@ void bnxt_qplib_free_ctx(struct pci_dev *pdev,
                         struct bnxt_qplib_ctx *ctx);
 int bnxt_qplib_alloc_ctx(struct pci_dev *pdev,
                         struct bnxt_qplib_ctx *ctx,
-                        bool virt_fn);
+                        bool virt_fn, bool is_p5);
 #endif /* __BNXT_QPLIB_RES_H__ */