pdata->trigger_enable[2] << EXYNOS_TMU_INTEN_RISE2_SHIFT |
pdata->trigger_enable[1] << EXYNOS_TMU_INTEN_RISE1_SHIFT |
pdata->trigger_enable[0] << EXYNOS_TMU_INTEN_RISE0_SHIFT;
- if (TMU_SUPPORTS(pdata, FALLING_TRIP))
+ if (data->soc != SOC_ARCH_EXYNOS4210)
interrupt_en |=
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
} else {
pdata->trigger_enable[2] << EXYNOS5440_TMU_INTEN_RISE2_SHIFT |
pdata->trigger_enable[1] << EXYNOS5440_TMU_INTEN_RISE1_SHIFT |
pdata->trigger_enable[0] << EXYNOS5440_TMU_INTEN_RISE0_SHIFT;
- if (TMU_SUPPORTS(pdata, FALLING_TRIP))
- interrupt_en |=
- interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
+ interrupt_en |= interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
} else {
con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en = 0; /* Disable all interrupts */
* temperature to the TMU controller.
* TMU_SUPPORT_MULTI_INST - This features denotes that the soc
* has many instances of TMU.
- * TMU_SUPPORT_FALLING_TRIP - This features shows that interrupt can
- * be registered for falling trips also.
* TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
* sample time.
* TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
*/
#define TMU_SUPPORT_EMULATION BIT(0)
#define TMU_SUPPORT_MULTI_INST BIT(1)
-#define TMU_SUPPORT_FALLING_TRIP BIT(2)
-#define TMU_SUPPORT_EMUL_TIME BIT(3)
-#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(4)
+#define TMU_SUPPORT_EMUL_TIME BIT(2)
+#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(3)
#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
- .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_EMUL_TIME)
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_EMUL_TIME)
#endif
#if defined(CONFIG_SOC_EXYNOS3250)
.temp_level = 95, \
}, \
.freq_tab_count = 2, \
- .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_EMUL_TIME)
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_EMUL_TIME)
#endif
#if defined(CONFIG_SOC_EXYNOS4412)
#define EXYNOS5260_TMU_DATA \
__EXYNOS5260_TMU_DATA \
.type = SOC_ARCH_EXYNOS5260, \
- .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_EMUL_TIME)
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_EMUL_TIME)
struct exynos_tmu_init_data const exynos5260_default_tmu_data = {
.tmu_data = {
#define EXYNOS5420_TMU_DATA \
__EXYNOS5420_TMU_DATA \
.type = SOC_ARCH_EXYNOS5420, \
- .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_EMUL_TIME)
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_EMUL_TIME)
#define EXYNOS5420_TMU_DATA_SHARED \
__EXYNOS5420_TMU_DATA \
.type = SOC_ARCH_EXYNOS5420_TRIMINFO, \
- .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_EMUL_TIME | \
+ TMU_SUPPORT_ADDRESS_MULTIPLE)
struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
.tmu_data = {
.second_point_trim = 70, \
.default_temp_offset = 25, \
.type = SOC_ARCH_EXYNOS5440, \
- .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_MULTI_INST | \
+ TMU_SUPPORT_ADDRESS_MULTIPLE),
struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
.tmu_data = {