static struct plat_serial8250_port serial_platform_data[] = {
{
- .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE),
- .mapbase = (unsigned long)OMAP_UART1_BASE,
+ .membase = IO_ADDRESS(OMAP_UART1_BASE),
+ .mapbase = OMAP_UART1_BASE,
.irq = INT_UART1,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{
- .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE),
- .mapbase = (unsigned long)OMAP_UART2_BASE,
+ .membase = IO_ADDRESS(OMAP_UART2_BASE),
+ .mapbase = OMAP_UART2_BASE,
.irq = INT_UART2,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{
- .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE),
- .mapbase = (unsigned long)OMAP_UART3_BASE,
+ .membase = IO_ADDRESS(OMAP_UART3_BASE),
+ .mapbase = OMAP_UART3_BASE,
.irq = INT_UART3,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
#ifndef __ASSEMBLER__
#define OMAP_CM_REGADDR(module, reg) \
- (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
+ IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
#else
#define OMAP2420_CM_REGADDR(module, reg) \
IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
static DEFINE_SPINLOCK(gpmc_mem_lock);
static unsigned gpmc_cs_map;
-static void __iomem *gpmc_base =
- (void __iomem *) IO_ADDRESS(GPMC_BASE);
-static void __iomem *gpmc_cs_base =
- (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
+static void __iomem *gpmc_base = IO_ADDRESS(GPMC_BASE);
+static void __iomem *gpmc_cs_base = IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
static struct clk *gpmc_fck;
#include <mach/cpu.h>
#if defined(CONFIG_ARCH_OMAP2420)
-#define TAP_BASE io_p2v(0x48014000)
+#define TAP_BASE IO_ADDRESS(0x48014000)
#elif defined(CONFIG_ARCH_OMAP2430)
-#define TAP_BASE io_p2v(0x4900A000)
+#define TAP_BASE IO_ADDRESS(0x4900A000)
#elif defined(CONFIG_ARCH_OMAP34XX)
-#define TAP_BASE io_p2v(0x4830A000)
+#define TAP_BASE IO_ADDRESS(0x4830A000)
#endif
#define OMAP_TAP_IDCODE 0x0204
* for each bank.. when in doubt, consult the TRM.
*/
static struct omap_irq_bank {
- unsigned long base_reg;
+ void __iomem *base_reg;
unsigned int nr_irqs;
} __attribute__ ((aligned(4))) irq_banks[] = {
{
unsigned long tmp;
tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff;
- printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx "
+ printk(KERN_INFO "IRQ: Found an INTC at 0x%p "
"(revision %ld.%ld) with %d interrupts\n",
bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
#ifndef __ASSEMBLER__
#define OMAP_PRM_REGADDR(module, reg) \
- (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
+ IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
#else
#define OMAP2420_PRM_REGADDR(module, reg) \
IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
static struct plat_serial8250_port serial_platform_data[] = {
{
- .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE),
- .mapbase = (unsigned long)OMAP_UART1_BASE,
+ .membase = IO_ADDRESS(OMAP_UART1_BASE),
+ .mapbase = OMAP_UART1_BASE,
.irq = 72,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
}, {
- .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE),
- .mapbase = (unsigned long)OMAP_UART2_BASE,
+ .membase = IO_ADDRESS(OMAP_UART2_BASE),
+ .mapbase = OMAP_UART2_BASE,
.irq = 73,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
}, {
- .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE),
- .mapbase = (unsigned long)OMAP_UART3_BASE,
+ .membase = IO_ADDRESS(OMAP_UART3_BASE),
+ .mapbase = OMAP_UART3_BASE,
.irq = 74,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
int value)
{
offset <<= p->regshift;
- __raw_writeb(value, (unsigned long)(p->membase + offset));
+ __raw_writeb(value, p->membase + offset);
}
/*
#if defined(CONFIG_ARCH_OMAP2420)
static struct omap_globals omap242x_globals = {
- .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000),
- .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
- .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
- .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
- .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
- .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
+ .tap = OMAP2_IO_ADDRESS(0x48014000),
+ .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
+ .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
+ .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
+ .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
+ .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
};
void __init omap2_set_globals_242x(void)
#if defined(CONFIG_ARCH_OMAP2430)
static struct omap_globals omap243x_globals = {
- .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000),
- .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
- .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
- .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
- .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
- .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
+ .tap = OMAP2_IO_ADDRESS(0x4900a000),
+ .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
+ .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
+ .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
+ .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
+ .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
};
void __init omap2_set_globals_243x(void)
#if defined(CONFIG_ARCH_OMAP3430)
static struct omap_globals omap343x_globals = {
- .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000),
- .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
- .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
- .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
- .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
- .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
+ .tap = OMAP2_IO_ADDRESS(0x4830A000),
+ .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
+ .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
+ .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
+ .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
+ .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
};
void __init omap2_set_globals_343x(void)
int ch, r;
if (cpu_class_is_omap1()) {
- omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE);
+ omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
} else if (cpu_is_omap24xx()) {
- omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE);
+ omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
} else if (cpu_is_omap34xx()) {
- omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE);
+ omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
} else {
pr_err("DMA init failed for unsupported omap\n");
for (i = 0; i < dm_timer_count; i++) {
timer = &dm_timers[i];
- timer->io_base = (void __iomem *)io_p2v(timer->phys_base);
+ timer->io_base = IO_ADDRESS(timer->phys_base);
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
if (cpu_class_is_omap2()) {
char clk_name[16];
#include <mach/io.h>
#define OMAP242X_CTRL_REGADDR(reg) \
- (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+ IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
#define OMAP243X_CTRL_REGADDR(reg) \
- (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+ IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
#define OMAP343X_CTRL_REGADDR(reg) \
- (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+ IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
/*
* As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for
#if defined(CONFIG_ARCH_OMAP1)
-#define IO_PHYS 0xFFFB0000
-#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
-#define IO_SIZE 0x40000
-#define IO_VIRT (IO_PHYS - IO_OFFSET)
-#define IO_ADDRESS(pa) ((pa) - IO_OFFSET)
-#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
-#define io_p2v(pa) ((pa) - IO_OFFSET)
-#define io_v2p(va) ((va) + IO_OFFSET)
+#define IO_PHYS 0xFFFB0000
+#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
+#define IO_SIZE 0x40000
+#define IO_VIRT (IO_PHYS - IO_OFFSET)
+#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
+#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
+#define io_v2p(va) ((va) + IO_OFFSET)
#elif defined(CONFIG_ARCH_OMAP2)
#endif
-#define IO_OFFSET 0x90000000
-#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
-#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
-#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
-#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
+#define IO_OFFSET 0x90000000
+#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
+#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
+#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
/* DSP */
#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
#define IO_OFFSET 0x90000000
-#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
/* DSP */
#endif
-#ifndef __ASSEMBLER__
+#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
+#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
+#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
+
+#ifdef __ASSEMBLER__
+#define IOMEM(x) x
+#else
+#define IOMEM(x) ((void __force __iomem *)(x))
/*
* Functions to access the OMAP IO region
* - DO NOT use hardcoded virtual addresses to allow changing the
* IO address space again if needed
*/
-#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a))
-#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a))
-#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a))
+#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
+#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
+#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
-#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
-#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
-#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
+#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a))
+#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a))
+#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a))
extern void omap1_map_common_io(void);
extern void omap1_init_common_hw(void);
* Register and offset definitions to be used in PM assembler code
* ----------------------------------------------------------------------------
*/
-#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00)
+#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00)
#define ARM_IDLECT1_ASM_OFFSET 0x04
#define ARM_IDLECT2_ASM_OFFSET 0x08
-#define TCMIF_ASM_BASE io_p2v(0xfffecc00)
+#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00)
#define EMIFS_CONFIG_ASM_OFFSET 0x0c
#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20
*/
-#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
-#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
-#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg)
/* SMS register offsets - read/write with sms_{read,write}_reg() */
dispc_write_reg(DISPC_CONTROL, l);
/* Set bypass mode in RFBI module */
- l = __raw_readl(io_p2v(RFBI_CONTROL));
+ l = __raw_readl(IO_ADDRESS(RFBI_CONTROL));
l |= enable ? 0 : (1 << 1);
- __raw_writel(l, io_p2v(RFBI_CONTROL));
+ __raw_writel(l, IO_ADDRESS(RFBI_CONTROL));
}
static void set_lcd_data_lines(int data_lines)
}
/* L3 firewall setting: enable access to OCM RAM */
- __raw_writel(0x402000b0, io_p2v(0x680050a0));
+ __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0));
if ((r = alloc_palette_ram()) < 0)
goto fail2;