/* Read a register in CM1 */
u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
{
- return readl_relaxed(OMAP44XX_CM1_REGADDR(inst, reg));
- return __raw_readl(cm_base + inst + reg);
++ return readl_relaxed(cm_base + inst + reg);
}
/* Write into a register in CM1 */
void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
{
- writel_relaxed(val, OMAP44XX_CM1_REGADDR(inst, reg));
- __raw_writel(val, cm_base + inst + reg);
++ writel_relaxed(val, cm_base + inst + reg);
}
/* Read a register in CM2 */
u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
{
- return readl_relaxed(OMAP44XX_CM2_REGADDR(inst, reg));
- return __raw_readl(cm2_base + inst + reg);
++ return readl_relaxed(cm2_base + inst + reg);
}
/* Write into a register in CM2 */
void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
{
- writel_relaxed(val, OMAP44XX_CM2_REGADDR(inst, reg));
- __raw_writel(val, cm2_base + inst + reg);
++ writel_relaxed(val, cm2_base + inst + reg);
}
return prm_register(&omap44xx_prm_ll_data);
}
--static int __init omap44xx_prm_late_init(void)
++static int omap44xx_prm_late_init(void)
{
- if (!cpu_is_omap44xx())
+ if (!(prm_features & PRM_HAS_IO_WAKEUP))
return 0;
omap44xx_prm_enable_io_wakeup();