drm/amd/display: fix issues with incorrectly detecting UPDATE_TYPE_FULL

This is due to how structures are being packed with padding added.
Structure field initialization doesn't clear the padding bytes, which cause
our memcmp to give incorrect result.

Move smaller structure parameters to end of structure.

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index f5f365b418c2bfaf103b891c16155f870ef79437..a8f34a92cee2844f56cf231560b6d1742fedb70a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -628,7 +628,8 @@ static bool is_validation_required(
                        return true;
 
                for (j = 0; j < set[i].surface_count; j++) {
-                       struct dc_surface temp_surf = { 0 };
+                       struct dc_surface temp_surf;
+                       memset(&temp_surf, 0, sizeof(temp_surf));
 
                        temp_surf = *context->stream_status[i].surfaces[j];
                        temp_surf.clip_rect = set[i].surfaces[j]->clip_rect;
@@ -1095,6 +1096,7 @@ static enum surface_update_type get_plane_info_update_type(
                int surface_index)
 {
        struct dc_plane_info temp_plane_info;
+       memset(&temp_plane_info, 0, sizeof(temp_plane_info));
 
        if (!u->plane_info)
                return UPDATE_TYPE_FAST;
@@ -1294,7 +1296,7 @@ void dc_update_surfaces_and_stream(struct dc *dc,
                update_surface_trace(dc, srf_updates, surface_count);
 
        if (update_type >= UPDATE_TYPE_FULL) {
-               const struct dc_surface *new_surfaces[MAX_SURFACES] = { 0 };
+               const struct dc_surface *new_surfaces[MAX_SURFACES] = {0};
 
                for (i = 0; i < surface_count; i++)
                        new_surfaces[i] = srf_updates[i].surface;

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 6d918391435a23258d4f18446c5e83afc5d1dbf8..36b3b123d3c7b5efcccf373349bda9cabe88a973 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -54,8 +54,8 @@ struct dc_caps {
 
 
 struct dc_dcc_surface_param {
-       enum surface_pixel_format format;
        struct dc_size surface_size;
+       enum surface_pixel_format format;
        enum swizzle_mode_values swizzle_mode;
        enum dc_scan_direction scan;
 };
@@ -67,9 +67,6 @@ struct dc_dcc_setting {
 };
 
 struct dc_surface_dcc_cap {
-       bool capable;
-       bool const_color_support;
-
        union {
                struct {
                        struct dc_dcc_setting rgb;
@@ -80,6 +77,9 @@ struct dc_surface_dcc_cap {
                        struct dc_dcc_setting chroma;
                } video;
        };
+
+       bool capable;
+       bool const_color_support;
 };
 
 struct dc_static_screen_events {
@@ -201,12 +201,12 @@ enum frame_buffer_mode {
 } ;
 
 struct dchub_init_data {
-       bool dchub_initialzied;
-       bool dchub_info_valid;
        int64_t zfb_phys_addr_base;
        int64_t zfb_mc_base_addr;
        uint64_t zfb_size_in_byte;
        enum frame_buffer_mode fb_mode;
+       bool dchub_initialzied;
+       bool dchub_info_valid;
 };
 
 struct dc_init_data {
@@ -240,9 +240,6 @@ enum {
 };
 
 struct dc_hdr_static_metadata {
-       bool hdr_supported;
-       bool is_hdr;
-
        /* display chromaticities and white point in units of 0.00001 */
        unsigned int chromaticity_green_x;
        unsigned int chromaticity_green_y;
@@ -257,6 +254,9 @@ struct dc_hdr_static_metadata {
        uint32_t max_luminance;
        uint32_t maximum_content_light_level;
        uint32_t maximum_frame_average_light_level;
+
+       bool hdr_supported;
+       bool is_hdr;
 };
 
 enum dc_transfer_func_type {
@@ -285,15 +285,12 @@ enum dc_transfer_func_predefined {
 };
 
 struct dc_transfer_func {
+       struct dc_transfer_func_distributed_points tf_pts;
        enum dc_transfer_func_type type;
        enum dc_transfer_func_predefined tf;
-       struct dc_transfer_func_distributed_points tf_pts;
 };
 
 struct dc_surface {
-       bool per_pixel_alpha;
-       bool visible;
-       bool flip_immediate;
        struct dc_plane_address address;
 
        struct scaling_taps scaling_quality;
@@ -303,38 +300,42 @@ struct dc_surface {
 
        union plane_size plane_size;
        union dc_tiling_info tiling_info;
+
        struct dc_plane_dcc_param dcc;
-       enum dc_color_space color_space;
+       struct dc_hdr_static_metadata hdr_static_ctx;
+
+       const struct dc_gamma *gamma_correction;
+       const struct dc_transfer_func *in_transfer_func;
 
+       enum dc_color_space color_space;
        enum surface_pixel_format format;
        enum dc_rotation_angle rotation;
-       bool horizontal_mirror;
        enum plane_stereo_format stereo_format;
 
-       struct dc_hdr_static_metadata hdr_static_ctx;
-
-       const struct dc_gamma *gamma_correction;
-       const struct dc_transfer_func *in_transfer_func;
+       bool per_pixel_alpha;
+       bool visible;
+       bool flip_immediate;
+       bool horizontal_mirror;
 };
 
 struct dc_plane_info {
-       bool per_pixel_alpha;
        union plane_size plane_size;
        union dc_tiling_info tiling_info;
        struct dc_plane_dcc_param dcc;
        enum surface_pixel_format format;
        enum dc_rotation_angle rotation;
-       bool horizontal_mirror;
        enum plane_stereo_format stereo_format;
        enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
+       bool horizontal_mirror;
        bool visible;
+       bool per_pixel_alpha;
 };
 
 struct dc_scaling_info {
-               struct rect src_rect;
-               struct rect dst_rect;
-               struct rect clip_rect;
-               struct scaling_taps scaling_quality;
+       struct rect src_rect;
+       struct rect dst_rect;
+       struct rect clip_rect;
+       struct scaling_taps scaling_quality;
 };
 
 struct dc_surface_update {
@@ -460,24 +461,26 @@ enum surface_update_type {
 struct dc_stream {
        const struct dc_sink *sink;
        struct dc_crtc_timing timing;
-       enum signal_type output_signal;
-
-       enum dc_color_space output_color_space;
-       enum dc_dither_option dither_option;
 
        struct rect src; /* composition area */
        struct rect dst; /* stream addressable area */
 
        struct audio_info audio_info;
 
-       bool ignore_msa_timing_param;
-
        struct freesync_context freesync_ctx;
 
        const struct dc_transfer_func *out_transfer_func;
        struct colorspace_transform gamut_remap_matrix;
        struct csc_transform csc_color_matrix;
+
+       enum signal_type output_signal;
+
+       enum dc_color_space output_color_space;
+       enum dc_dither_option dither_option;
+
        enum view_3d_format view_format;
+
+       bool ignore_msa_timing_param;
        /* TODO: custom INFO packets */
        /* TODO: ABM info (DMCU) */
        /* TODO: PSR info */
@@ -667,9 +670,10 @@ struct dc_link {
        union compliance_test_state compliance_test_state;
 
        void *priv;
-       bool aux_mode;
 
        struct ddc_service *ddc;
+
+       bool aux_mode;
 };
 
 struct dpcd_caps {
@@ -685,12 +689,13 @@ struct dpcd_caps {
        indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
        struct dc_dongle_caps dongle_caps;
 
-       bool allow_invalid_MSA_timing_param;
-       bool panel_mode_edp;
        uint32_t sink_dev_id;
        uint32_t branch_dev_id;
        int8_t branch_dev_name[6];
        int8_t branch_hw_revision;
+
+       bool allow_invalid_MSA_timing_param;
+       bool panel_mode_edp;
 };
 
 struct dc_link_status {
@@ -801,9 +806,9 @@ struct dc_sink {
        struct dc_edid_caps edid_caps; /* parse display caps */
        struct dc_container_id *dc_container_id;
        uint32_t dongle_max_pix_clk;
-       bool converter_disable_audio;
        void *priv;
        struct stereo_3d_features features_3d[TIMING_3D_FORMAT_MAX];
+       bool converter_disable_audio;
 };
 
 void dc_sink_retain(const struct dc_sink *sink);