MIPS: Add new end of interrupt functionality for GIC.

Each platform should define its own 'gic_finish_irq' function.

Signed-off-by: Steven J. Hill <sjhill@mips.com>

diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index e9a46d0205a2f30de970d9ef1273fea6af0ec414..c2bec301e7ade8b0b5a4a9865c458a90081962eb 100644 (file)
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -195,7 +195,7 @@ static struct irq_chip gic_irq_controller = {
        .irq_mask               =       gic_mask_irq,
        .irq_mask_ack           =       gic_mask_irq,
        .irq_unmask             =       gic_unmask_irq,
-       .irq_eoi                =       gic_unmask_irq,
+       .irq_eoi                =       gic_finish_irq,
 #ifdef CONFIG_SMP
        .irq_set_affinity       =       gic_set_affinity,
 #endif